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Re: [PATCH 02/13] target/arm: Add isar_feature_any_fp16 and document nam
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH 02/13] target/arm: Add isar_feature_any_fp16 and document naming/usage conventions |
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Date: |
Wed, 12 Feb 2020 11:32:06 +0000 |
On Wed, 12 Feb 2020 at 06:24, Philippe Mathieu-Daudé <address@hidden> wrote:
>
> On 2/11/20 6:37 PM, Peter Maydell wrote:
> > @@ -185,7 +185,7 @@ uint32_t vfp_get_fpscr(CPUARMState *env)
> > void HELPER(vfp_set_fpscr)(CPUARMState *env, uint32_t val)
> > {
> > /* When ARMv8.2-FP16 is not supported, FZ16 is RES0. */
> > - if (!cpu_isar_feature(aa64_fp16, env_archcpu(env))) {
> > + if (!cpu_isar_feature(any_fp16, env_archcpu(env))) {
>
> So we had a potential bug on aa32?
No, because right now we don't support AA32 FP16 yet (so
the aa32_fp16_arith check is temporarily testing an AA64
ID reg, as noted in a TODO comment in that function), and
anyway all our CPUs which have ARMv8 features also mandatorily
have AArch64 currently. This is mainly tidyup so we are in
a position to add a new v8-32-bit-only CPU if we want to.
thanks
--- PMM
- [PATCH 00/13] arm: Implement ARMv8.1-PMU and ARMv8.4-PMU, Peter Maydell, 2020/02/11
- [PATCH 02/13] target/arm: Add isar_feature_any_fp16 and document naming/usage conventions, Peter Maydell, 2020/02/11
- [PATCH 01/13] target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registers, Peter Maydell, 2020/02/11
- [PATCH 03/13] target/arm: Define and use any_predinv isar_feature test, Peter Maydell, 2020/02/11
- [PATCH 06/13] target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON field, Peter Maydell, 2020/02/11
- [PATCH 05/13] target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1, Peter Maydell, 2020/02/11