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[PULL 06/46] arm/acpi: fix PCI _PRT definition
From: |
Peter Maydell |
Subject: |
[PULL 06/46] arm/acpi: fix PCI _PRT definition |
Date: |
Thu, 13 Feb 2020 14:41:05 +0000 |
From: Heyi Guo <address@hidden>
The address field in each _PRT mapping package should be constructed
with high word for device# and low word for function#, so it is wrong
to use bus_no as the high word. The existing code adds a bunch useless
entries with device #s above 31. Enumerate all possible slots
(i.e. PCI_SLOT_MAX) instead.
Signed-off-by: Heyi Guo <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/virt-acpi-build.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index be752c0ad8e..5d157a9dd5e 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -151,7 +151,7 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry
*memmap,
{
int ecam_id = VIRT_ECAM_ID(highmem_ecam);
Aml *method, *crs, *ifctx, *UUID, *ifctx1, *elsectx, *buf;
- int i, bus_no;
+ int i, slot_no;
hwaddr base_mmio = memmap[VIRT_PCIE_MMIO].base;
hwaddr size_mmio = memmap[VIRT_PCIE_MMIO].size;
hwaddr base_pio = memmap[VIRT_PCIE_PIO].base;
@@ -170,12 +170,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const
MemMapEntry *memmap,
aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
/* Declare the PCI Routing Table. */
- Aml *rt_pkg = aml_varpackage(nr_pcie_buses * PCI_NUM_PINS);
- for (bus_no = 0; bus_no < nr_pcie_buses; bus_no++) {
+ Aml *rt_pkg = aml_varpackage(PCI_SLOT_MAX * PCI_NUM_PINS);
+ for (slot_no = 0; slot_no < PCI_SLOT_MAX; slot_no++) {
for (i = 0; i < PCI_NUM_PINS; i++) {
- int gsi = (i + bus_no) % PCI_NUM_PINS;
+ int gsi = (i + slot_no) % PCI_NUM_PINS;
Aml *pkg = aml_package(4);
- aml_append(pkg, aml_int((bus_no << 16) | 0xFFFF));
+ aml_append(pkg, aml_int((slot_no << 16) | 0xFFFF));
aml_append(pkg, aml_int(i));
aml_append(pkg, aml_name("GSI%d", gsi));
aml_append(pkg, aml_int(0));
--
2.20.1
- [PULL 00/46] target-arm queue, Peter Maydell, 2020/02/13
- [PULL 01/46] i.MX: Fix inverted register bits in wdt code., Peter Maydell, 2020/02/13
- [PULL 04/46] arm/virt/acpi: remove meaningless sub device "RP0" from PCI0, Peter Maydell, 2020/02/13
- [PULL 03/46] bios-tables-test: prepare to change ARM virt ACPI DSDT, Peter Maydell, 2020/02/13
- [PULL 02/46] i.MX: Add support for WDT on i.MX6, Peter Maydell, 2020/02/13
- [PULL 06/46] arm/acpi: fix PCI _PRT definition,
Peter Maydell <=
- [PULL 05/46] arm/virt/acpi: remove _ADR from devices identified by _HID, Peter Maydell, 2020/02/13
- [PULL 07/46] arm/acpi: fix duplicated _UID of PCI interrupt link devices, Peter Maydell, 2020/02/13
- [PULL 08/46] arm/acpi: simplify the description of PCI _CRS, Peter Maydell, 2020/02/13
- [PULL 09/46] virt/acpi: update golden masters for DSDT update, Peter Maydell, 2020/02/13
- [PULL 12/46] target/arm: Add isar_feature tests for PAN + ATS1E1, Peter Maydell, 2020/02/13
- [PULL 10/46] target/arm: Add arm_mmu_idx_is_stage1_of_2, Peter Maydell, 2020/02/13
- [PULL 14/46] target/arm: Split out aarch32_cpsr_valid_mask, Peter Maydell, 2020/02/13
- [PULL 15/46] target/arm: Mask CPSR_J when Jazelle is not enabled, Peter Maydell, 2020/02/13
- [PULL 11/46] target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled, Peter Maydell, 2020/02/13
- [PULL 19/46] target/arm: Introduce aarch64_pstate_valid_mask, Peter Maydell, 2020/02/13