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[PULL 31/46] hw/arm: ast2600: Wire up EHCI controllers
From: |
Peter Maydell |
Subject: |
[PULL 31/46] hw/arm: ast2600: Wire up EHCI controllers |
Date: |
Thu, 13 Feb 2020 14:41:30 +0000 |
From: Guenter Roeck <address@hidden>
Initialize EHCI controllers on AST2600 using the existing
TYPE_PLATFORM_EHCI. After this change, booting ast2600-evb
into Linux successfully instantiates a USB interface after
the necessary changes are made to its devicetree files.
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-platform: EHCI generic platform driver
ehci-platform 1e6a3000.usb: EHCI Host Controller
ehci-platform 1e6a3000.usb: new USB bus registered, assigned bus number 1
ehci-platform 1e6a3000.usb: irq 25, io mem 0x1e6a3000
ehci-platform 1e6a3000.usb: USB 2.0 started, EHCI 1.00
usb usb1: Manufacturer: Linux 5.5.0-09825-ga0802f2d0ef5-dirty ehci_hcd
usb 1-1: new high-speed USB device number 2 using ehci-platform
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
Reviewed-by: Niek Linnenbank <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/aspeed_ast2600.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 90cf1c755d3..446b44d31cf 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -31,6 +31,8 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
[ASPEED_FMC] = 0x1E620000,
[ASPEED_SPI1] = 0x1E630000,
[ASPEED_SPI2] = 0x1E641000,
+ [ASPEED_EHCI1] = 0x1E6A1000,
+ [ASPEED_EHCI2] = 0x1E6A3000,
[ASPEED_MII1] = 0x1E650000,
[ASPEED_MII2] = 0x1E650008,
[ASPEED_MII3] = 0x1E650010,
@@ -79,6 +81,8 @@ static const int aspeed_soc_ast2600_irqmap[] = {
[ASPEED_ADC] = 78,
[ASPEED_XDMA] = 6,
[ASPEED_SDHCI] = 43,
+ [ASPEED_EHCI1] = 5,
+ [ASPEED_EHCI2] = 9,
[ASPEED_EMMC] = 15,
[ASPEED_GPIO] = 40,
[ASPEED_GPIO_1_8V] = 11,
@@ -166,6 +170,11 @@ static void aspeed_soc_ast2600_init(Object *obj)
sizeof(s->spi[i]), typename);
}
+ for (i = 0; i < sc->ehcis_num; i++) {
+ sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]),
+ sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI);
+ }
+
snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname);
sysbus_init_child_obj(obj, "sdmc", OBJECT(&s->sdmc), sizeof(s->sdmc),
typename);
@@ -416,6 +425,19 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev,
Error **errp)
s->spi[i].ctrl->flash_window_base);
}
+ /* EHCI */
+ for (i = 0; i < sc->ehcis_num; i++) {
+ object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
+ sc->memmap[ASPEED_EHCI1 + i]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
+ aspeed_soc_get_irq(s, ASPEED_EHCI1 + i));
+ }
+
/* SDMC - SDRAM Memory Controller */
object_property_set_bool(OBJECT(&s->sdmc), true, "realized", &err);
if (err) {
@@ -534,6 +556,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *oc,
void *data)
sc->silicon_rev = AST2600_A0_SILICON_REV;
sc->sram_size = 0x10000;
sc->spis_num = 2;
+ sc->ehcis_num = 2;
sc->wdts_num = 4;
sc->macs_num = 4;
sc->irqmap = aspeed_soc_ast2600_irqmap;
--
2.20.1
- [PULL 20/46] target/arm: Update MSR access for PAN, (continued)
- [PULL 20/46] target/arm: Update MSR access for PAN, Peter Maydell, 2020/02/13
- [PULL 13/46] target/arm: Move LOR regdefs to file scope, Peter Maydell, 2020/02/13
- [PULL 23/46] target/arm: Set PAN bit as required on exception entry, Peter Maydell, 2020/02/13
- [PULL 27/46] target/arm: Update MSR access to UAO, Peter Maydell, 2020/02/13
- [PULL 26/46] target/arm: Add ID_AA64MMFR2_EL1, Peter Maydell, 2020/02/13
- [PULL 24/46] target/arm: Implement ATS1E1 system registers, Peter Maydell, 2020/02/13
- [PULL 25/46] target/arm: Enable ARMv8.2-ATS1E1 in -cpu max, Peter Maydell, 2020/02/13
- [PULL 30/46] hw/arm: ast2400/ast2500: Wire up EHCI controllers, Peter Maydell, 2020/02/13
- [PULL 28/46] target/arm: Implement UAO semantics, Peter Maydell, 2020/02/13
- [PULL 29/46] target/arm: Enable ARMv8.2-UAO in -cpu max, Peter Maydell, 2020/02/13
- [PULL 31/46] hw/arm: ast2600: Wire up EHCI controllers,
Peter Maydell <=
- [PULL 32/46] hw/char/exynos4210_uart: Fix memleaks in exynos4210_uart_init, Peter Maydell, 2020/02/13
- [PULL 38/46] hw/arm/raspi: Trivial code movement, Peter Maydell, 2020/02/13
- [PULL 33/46] hw/arm/raspi: Use BCM2708 machine type with pre Device Tree kernels, Peter Maydell, 2020/02/13
- [PULL 34/46] hw/arm/raspi: Correct the board descriptions, Peter Maydell, 2020/02/13
- [PULL 37/46] hw/arm/raspi: Extract the processor type from the board revision, Peter Maydell, 2020/02/13
- [PULL 35/46] hw/arm/raspi: Extract the version from the board revision, Peter Maydell, 2020/02/13
- [PULL 36/46] hw/arm/raspi: Extract the RAM size from the board revision, Peter Maydell, 2020/02/13
- [PULL 42/46] hw/arm/raspi: Set default RAM size to size encoded in board revision, Peter Maydell, 2020/02/13
- [PULL 44/46] hw/arm/raspi: Use a unique raspi_machine_class_init() method, Peter Maydell, 2020/02/13
- [PULL 41/46] hw/arm/raspi: Let class_init() directly call raspi_machine_init(), Peter Maydell, 2020/02/13