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[PULL 51/52] target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}
From: |
Peter Maydell |
Subject: |
[PULL 51/52] target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3 |
Date: |
Fri, 21 Feb 2020 13:07:39 +0000 |
From: Richard Henderson <address@hidden>
Sort this check to the start of a trans_* function.
Merge this with any existing test for fpdp_v2.
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate-vfp.inc.c | 24 ++++++++----------------
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c
index 0c551401273..9e5516f208b 100644
--- a/target/arm/translate-vfp.inc.c
+++ b/target/arm/translate-vfp.inc.c
@@ -717,7 +717,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS
*a)
* VFPv2 allows access to FPSID from userspace; VFPv3 restricts
* all ID registers to privileged access only.
*/
- if (IS_USER(s) && arm_dc_feature(s, ARM_FEATURE_VFP3)) {
+ if (IS_USER(s) && dc_isar_feature(aa32_fpsp_v3, s)) {
return false;
}
ignore_vfp_enabled = true;
@@ -746,7 +746,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS
*a)
case ARM_VFP_FPINST:
case ARM_VFP_FPINST2:
/* Not present in VFPv3 */
- if (IS_USER(s) || arm_dc_feature(s, ARM_FEATURE_VFP3)) {
+ if (IS_USER(s) || dc_isar_feature(aa32_fpsp_v3, s)) {
return false;
}
break;
@@ -1871,12 +1871,12 @@ static bool trans_VMOV_imm_sp(DisasContext *s,
arg_VMOV_imm_sp *a)
vd = a->vd;
- if (!dc_isar_feature(aa32_fpshvec, s) &&
- (veclen != 0 || s->vec_stride != 0)) {
+ if (!dc_isar_feature(aa32_fpsp_v3, s)) {
return false;
}
- if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
+ if (!dc_isar_feature(aa32_fpshvec, s) &&
+ (veclen != 0 || s->vec_stride != 0)) {
return false;
}
@@ -1921,7 +1921,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s,
arg_VMOV_imm_dp *a)
vd = a->vd;
- if (!dc_isar_feature(aa32_fpdp_v2, s)) {
+ if (!dc_isar_feature(aa32_fpdp_v3, s)) {
return false;
}
@@ -1935,10 +1935,6 @@ static bool trans_VMOV_imm_dp(DisasContext *s,
arg_VMOV_imm_dp *a)
return false;
}
- if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
- return false;
- }
-
if (!vfp_access_check(s)) {
return true;
}
@@ -2563,7 +2559,7 @@ static bool trans_VCVT_fix_sp(DisasContext *s,
arg_VCVT_fix_sp *a)
TCGv_ptr fpst;
int frac_bits;
- if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
+ if (!dc_isar_feature(aa32_fpsp_v3, s)) {
return false;
}
@@ -2623,11 +2619,7 @@ static bool trans_VCVT_fix_dp(DisasContext *s,
arg_VCVT_fix_dp *a)
TCGv_ptr fpst;
int frac_bits;
- if (!dc_isar_feature(aa32_fpdp_v2, s)) {
- return false;
- }
-
- if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
+ if (!dc_isar_feature(aa32_fpdp_v3, s)) {
return false;
}
--
2.20.1
- [PULL 40/52] target/arm: Convert PMULL.64 to gvec, (continued)
- [PULL 40/52] target/arm: Convert PMULL.64 to gvec, Peter Maydell, 2020/02/21
- [PULL 38/52] target/arm: Vectorize USHL and SSHL, Peter Maydell, 2020/02/21
- [PULL 41/52] target/arm: Convert PMULL.8 to gvec, Peter Maydell, 2020/02/21
- [PULL 44/52] target/arm: Rename isar_feature_aa32_simd_r32, Peter Maydell, 2020/02/21
- [PULL 45/52] target/arm: Use isar_feature_aa32_simd_r32 more places, Peter Maydell, 2020/02/21
- [PULL 46/52] target/arm: Set MVFR0.FPSP for ARMv5 cpus, Peter Maydell, 2020/02/21
- [PULL 49/52] target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3, fpdp_v3}, Peter Maydell, 2020/02/21
- [PULL 48/52] target/arm: Rename isar_feature_aa32_fpdp_v2, Peter Maydell, 2020/02/21
- [PULL 43/52] sh4: Fix PCI ISA IO memory subregion, Peter Maydell, 2020/02/21
- [PULL 47/52] target/arm: Add isar_feature_aa32_simd_r16, Peter Maydell, 2020/02/21
- [PULL 51/52] target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3,
Peter Maydell <=
- [PULL 50/52] target/arm: Perform fpdp_v2 check first, Peter Maydell, 2020/02/21
- [PULL 52/52] target/arm: Add missing checks for fpsp_v2, Peter Maydell, 2020/02/21
- Re: [PULL 00/52] target-arm queue, no-reply, 2020/02/21
- Re: [PULL 00/52] target-arm queue, no-reply, 2020/02/21
- Re: [PULL 00/52] target-arm queue, no-reply, 2020/02/21