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[RFC PATCH v2 39/67] Hexagon TCG generation - step 01
From: |
Taylor Simpson |
Subject: |
[RFC PATCH v2 39/67] Hexagon TCG generation - step 01 |
Date: |
Fri, 28 Feb 2020 10:43:35 -0600 |
Include the generated files and set up the data structures
Signed-off-by: Taylor Simpson <address@hidden>
---
target/hexagon/genptr.h | 25 +++++++++++++++++++++
target/hexagon/genptr.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 84 insertions(+)
create mode 100644 target/hexagon/genptr.h
create mode 100644 target/hexagon/genptr.c
diff --git a/target/hexagon/genptr.h b/target/hexagon/genptr.h
new file mode 100644
index 0000000..a3a3db1
--- /dev/null
+++ b/target/hexagon/genptr.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_GENPTR_H
+#define HEXAGON_GENPTR_H
+
+#include "insn.h"
+
+extern semantic_insn_t opcode_genptr[];
+
+#endif
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
new file mode 100644
index 0000000..5a602bd
--- /dev/null
+++ b/target/hexagon/genptr.c
@@ -0,0 +1,59 @@
+/*
+ * Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights
Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define QEMU_GENERATE
+#include "qemu/osdep.h"
+#include "qemu/log.h"
+#include "cpu.h"
+#include "internal.h"
+#include "tcg/tcg-op.h"
+#include "insn.h"
+#include "opcodes.h"
+#include "translate.h"
+#include "macros.h"
+#include "genptr_helpers.h"
+
+#include "qemu_wrap_generated.h"
+
+#define DEF_QEMU(TAG, SHORTCODE, HELPER, GENFN, HELPFN) \
+static void generate_##TAG(CPUHexagonState *env, DisasContext *ctx, \
+ insn_t *insn) \
+{ \
+ GENFN \
+}
+#include "qemu_def_generated.h"
+#undef DEF_QEMU
+
+
+/* Fill in the table with NULLs because not all the opcodes have DEF_QEMU */
+semantic_insn_t opcode_genptr[] = {
+#define OPCODE(X) NULL
+#include "opcodes_def_generated.h"
+ NULL
+#undef OPCODE
+};
+
+/* This function overwrites the NULL entries where we have a DEF_QEMU */
+void init_genptr(void)
+{
+#define DEF_QEMU(TAG, SHORTCODE, HELPER, GENFN, HELPFN) \
+ opcode_genptr[TAG] = generate_##TAG;
+#include "qemu_def_generated.h"
+#undef DEF_QEMU
+}
+
+
--
2.7.4
- [RFC PATCH v2 22/67] Hexagon generator phase 2 - qemu_def_generated.h, (continued)
- [RFC PATCH v2 22/67] Hexagon generator phase 2 - qemu_def_generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 06/67] Hexagon Disassembler, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 47/67] Hexagon TCG generation - step 09, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 32/67] Hexagon macros referenced in instruction semantics, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 62/67] Hexagon HVX macros to interface with the generator, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 48/67] Hexagon TCG generation - step 10, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 26/67] Hexagon generator phase 2 - op_regs_generated.h, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 58/67] Hexagon HVX import macro definitions, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 60/67] Hexagon HVX instruction decoding, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 63/67] Hexagon HVX macros referenced in instruction semantics, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 39/67] Hexagon TCG generation - step 01,
Taylor Simpson <=
- [RFC PATCH v2 52/67] Hexagon Linux user emulation, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 56/67] Hexagon HVX import instruction encodings, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 46/67] Hexagon TCG generation - step 08, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 54/67] Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 30/67] Hexagon opcode data structures, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 61/67] Hexagon HVX instruction utility functions, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 36/67] Hexagon TCG generation helpers - step 3, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 35/67] Hexagon TCG generation helpers - step 2, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 45/67] Hexagon TCG generation - step 07, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 50/67] Hexagon TCG generation - step 12, Taylor Simpson, 2020/02/28