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[PULL 57/66] target/mips: Remove now unreachable LSA/DLSA opcodes code
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 57/66] target/mips: Remove now unreachable LSA/DLSA opcodes code |
Date: |
Thu, 7 Jan 2021 23:22:44 +0100 |
Since we switched to decodetree-generated processing,
we can remove this now unreachable code.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201208203704.243704-6-f4bug@amsat.org>
---
target/mips/translate.c | 29 +++++------------------------
1 file changed, 5 insertions(+), 24 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index cd34b06faae..f4481afb8de 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -280,9 +280,6 @@ enum {
R6_OPC_DCLZ = 0x12 | OPC_SPECIAL,
R6_OPC_DCLO = 0x13 | OPC_SPECIAL,
R6_OPC_SDBBP = 0x0e | OPC_SPECIAL,
-
- OPC_LSA = 0x05 | OPC_SPECIAL,
- OPC_DLSA = 0x15 | OPC_SPECIAL,
};
/* Multiplication variants of the vr54xx. */
@@ -24319,9 +24316,6 @@ static void decode_opc_special_r6(CPUMIPSState *env,
DisasContext *ctx)
op1 = MASK_SPECIAL(ctx->opcode);
switch (op1) {
- case OPC_LSA:
- gen_LSA(ctx, rd, rt, rs, extract32(ctx->opcode, 6, 2));
- break;
case OPC_MULT:
case OPC_MULTU:
case OPC_DIV:
@@ -24372,10 +24366,6 @@ static void decode_opc_special_r6(CPUMIPSState *env,
DisasContext *ctx)
}
break;
#if defined(TARGET_MIPS64)
- case OPC_DLSA:
- check_mips_64(ctx);
- gen_DLSA(ctx, rd, rt, rs, extract32(ctx->opcode, 6, 2));
- break;
case R6_OPC_DCLO:
case R6_OPC_DCLZ:
if (rt == 0 && sa == 1) {
@@ -24637,18 +24627,14 @@ static void decode_opc_special(CPUMIPSState *env,
DisasContext *ctx)
check_insn(ctx, ISA_MIPS2);
gen_trap(ctx, op1, rs, rt, -1);
break;
- case OPC_LSA: /* OPC_PMON */
- if ((ctx->insn_flags & ISA_MIPS_R6) || ase_msa_available(env)) {
- decode_opc_special_r6(env, ctx);
- } else {
- /* Pmon entry point, also R4010 selsl */
+ case OPC_PMON:
+ /* Pmon entry point, also R4010 selsl */
#ifdef MIPS_STRICT_STANDARD
- MIPS_INVAL("PMON / selsl");
- gen_reserved_instruction(ctx);
+ MIPS_INVAL("PMON / selsl");
+ gen_reserved_instruction(ctx);
#else
- gen_helper_0e0i(pmon, sa);
+ gen_helper_0e0i(pmon, sa);
#endif
- }
break;
case OPC_SYSCALL:
generate_exception_end(ctx, EXCP_SYSCALL);
@@ -24739,11 +24725,6 @@ static void decode_opc_special(CPUMIPSState *env,
DisasContext *ctx)
break;
}
break;
- case OPC_DLSA:
- if ((ctx->insn_flags & ISA_MIPS_R6) || ase_msa_available(env)) {
- decode_opc_special_r6(env, ctx);
- }
- break;
#endif
default:
if (ctx->insn_flags & ISA_MIPS_R6) {
--
2.26.2
- [PULL 47/66] target/mips: Extract MSA helpers from op_helper.c, (continued)
- [PULL 47/66] target/mips: Extract MSA helpers from op_helper.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 48/66] target/mips: Extract MSA helper definitions, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 49/66] target/mips: Declare gen_msa/_branch() in 'translate.h', Philippe Mathieu-Daudé, 2021/01/07
- [PULL 50/66] target/mips: Extract MSA translation routines, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 51/66] target/mips: Pass TCGCond argument to MSA gen_check_zero_element(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 52/66] target/mips: Introduce decode tree bindings for MSA ASE, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 53/66] target/mips: Use decode_ase_msa() generated from decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 54/66] target/mips: Extract LSA/DLSA translation generators, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 55/66] target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 56/66] target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodes, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 57/66] target/mips: Remove now unreachable LSA/DLSA opcodes code,
Philippe Mathieu-Daudé <=
- [PULL 58/66] target/mips: Convert Rel6 Special2 opcode to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 59/66] target/mips: Convert Rel6 COP1X opcode to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 60/66] target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 61/66] target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 62/66] target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 63/66] target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 64/66] target/mips: Convert Rel6 LLD/SCD opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 65/66] target/mips: Convert Rel6 LL/SC opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 66/66] docs/system: Remove deprecated 'fulong2e' machine alias, Philippe Mathieu-Daudé, 2021/01/07
- Re: [PULL 00/66] MIPS patches for 2021-01-07, Philippe Mathieu-Daudé, 2021/01/07