[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v7 09/10] hw/arm/xlnx-versal-virt: Connect mt35xu01g flashes to t
From: |
Francisco Iglesias |
Subject: |
[PATCH v7 09/10] hw/arm/xlnx-versal-virt: Connect mt35xu01g flashes to the OSPI |
Date: |
Fri, 21 Jan 2022 16:11:40 +0000 |
Connect Micron Xccela mt35xu01g flashes to the OSPI flash memory
controller.
Signed-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/xlnx-versal-virt.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 8ea9979710..3f56ae28ee 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -25,6 +25,8 @@
#define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt")
OBJECT_DECLARE_SIMPLE_TYPE(VersalVirt, XLNX_VERSAL_VIRT_MACHINE)
+#define XLNX_VERSAL_NUM_OSPI_FLASH 4
+
struct VersalVirt {
MachineState parent_obj;
@@ -691,6 +693,27 @@ static void versal_virt_init(MachineState *machine)
exit(EXIT_FAILURE);
}
}
+
+ for (i = 0; i < XLNX_VERSAL_NUM_OSPI_FLASH; i++) {
+ BusState *spi_bus;
+ DeviceState *flash_dev;
+ qemu_irq cs_line;
+ DriveInfo *dinfo = drive_get(IF_MTD, 0, i);
+
+ spi_bus = qdev_get_child_bus(DEVICE(&s->soc.pmc.iou.ospi), "spi0");
+
+ flash_dev = qdev_new("mt35xu01g");
+ if (dinfo) {
+ qdev_prop_set_drive_err(flash_dev, "drive",
+ blk_by_legacy_dinfo(dinfo), &error_fatal);
+ }
+ qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal);
+
+ cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.pmc.iou.ospi),
+ i + 1, cs_line);
+ }
}
static void versal_virt_machine_instance_init(Object *obj)
--
2.11.0
- [PATCH v7 01/10] hw/misc: Add a model of Versal's PMC SLCR, (continued)
- [PATCH v7 01/10] hw/misc: Add a model of Versal's PMC SLCR, Francisco Iglesias, 2022/01/21
- [PATCH v7 03/10] hw/arm/xlnx-versal: Connect Versal's PMC SLCR, Francisco Iglesias, 2022/01/21
- [PATCH v7 04/10] include/hw/dma/xlnx_csu_dma: Add in missing includes in the header, Francisco Iglesias, 2022/01/21
- [PATCH v7 08/10] hw/block/m25p80: Add support for Micron Xccela flash mt35xu01g, Francisco Iglesias, 2022/01/21
- [PATCH v7 06/10] hw/ssi: Add a model of Xilinx Versal's OSPI flash memory controller, Francisco Iglesias, 2022/01/21
- [PATCH v7 07/10] hw/arm/xlnx-versal: Connect the OSPI flash memory controller model, Francisco Iglesias, 2022/01/21
- [PATCH v7 05/10] hw/dma/xlnx_csu_dma: Support starting a read transfer through a class method, Francisco Iglesias, 2022/01/21
- [PATCH v7 10/10] MAINTAINERS: Add an entry for Xilinx Versal OSPI, Francisco Iglesias, 2022/01/21
- [PATCH v7 09/10] hw/arm/xlnx-versal-virt: Connect mt35xu01g flashes to the OSPI,
Francisco Iglesias <=
- [PATCH v7 02/10] hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC models, Francisco Iglesias, 2022/01/21
- Re: [PATCH v7 00/10] Xilinx Versal's PMC SLCR and OSPI support, Peter Maydell, 2022/01/27