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Re: [PATCH 2/3] target/mips: implement Octeon-specific BBIT instructions


From: Richard Henderson
Subject: Re: [PATCH 2/3] target/mips: implement Octeon-specific BBIT instructions
Date: Tue, 7 Jun 2022 10:06:25 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1

On 6/7/22 01:59, Pavel Dovgalyuk wrote:
+# Branch on bit set or clear
+# BBIT0      110010 ..... ..... ................
+# BBIT032    110110 ..... ..... ................
+# BBIT1      111010 ..... ..... ................
+# BBIT132    111110 ..... ..... ................
+
+BBIT         11 set:1 shift:1 10 rs:5 p:5 offset:16

shift + p are logically one field -- all you need to do is concatenate them.

%bbit_p         28:1 16:5
BBIT            11 set:1 . 10 rs:5 ..... offset:16  p=%bbit_p

+    if (ctx->hflags & MIPS_HFLAG_BMASK) {
+#ifdef MIPS_DEBUG_DISAS
+        LOG_DISAS("Branch in delay / forbidden slot at PC 0x"
+                  TARGET_FMT_lx "\n", ctx->base.pc_next);
+#endif

Ifdef isn't needed -- it's always defined, even to 0.

+    tcg_gen_andi_tl(t0, t0, 1ULL << p);
+
+    /* Jump conditions */
+    if (a->set) {
+        tcg_gen_setcondi_tl(TCG_COND_NE, bcond, t0, 0);
+    } else {
+        tcg_gen_setcondi_tl(TCG_COND_EQ, bcond, t0, 0);
+    }

You don't need to produce a boolean, MIPS_HFLAG_BC tests for non-zero. Thus you can simplify this to

    p = tcg_constant_tl(1ull << a->p);
    if (a->set) {
        tcg_gen_and_tl(bcond, rs, p);
    } else {
        tcg_gen_andc_tl(bcond, p, rs);
    }


r~



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