qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] hw/riscv: boot: Reduce FDT address alignment constraints


From: Bin Meng
Subject: Re: [PATCH] hw/riscv: boot: Reduce FDT address alignment constraints
Date: Mon, 27 Jun 2022 22:03:08 +0800

On Wed, Jun 8, 2022 at 2:20 PM Alistair Francis
<alistair.francis@opensource.wdc.com> wrote:
>
> From: Alistair Francis <alistair.francis@wdc.com>
>
> We previously stored the device tree at a 16MB alignment from the end of
> memory (or 3GB). This means we need at least 16MB of memory to be able
> to do this. We don't actually need the FDT to be 16MB aligned, so let's
> drop it down to 2MB so that we can support systems with less memory,
> while also allowing FDT size expansion.
>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/992
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  hw/riscv/boot.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>

Reviewed-by: Bin Meng <bin.meng@windriver.com>

Tested booting Linux 64-bit/32-bit v5.18 kernel, VxWorks 7
64-bit/32-bit 22.06 release kernel
Tested-by: Bin Meng <bin.meng@windriver.com>



reply via email to

[Prev in Thread] Current Thread [Next in Thread]