Re: [PATCH] target/i386/hax: Add XCR0 support

[Philippe Mathieu-Daudé]

Hi Wenchao,

On 5/12/22 09:35, Wang, Wenchao wrote:
> Hi, Philippe,
>
> Do you agree with my opinion and is there any further process that I need to 
> follow to get this patch merged? Thanks a lot.

I don't understand this part of HAXM enough, but per your explanation, 
your change looks correct. I'll let Paolo decide :)

Regards,

Phil.

> Best Regards,
> Wenchao
>
> -----Original Message-----
> From: Wang, Wenchao
> Sent: Monday, November 28, 2022 16:11
> To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org
> Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com>
> Subject: RE: [PATCH] target/i386/hax: Add XCR0 support
>
> Hi, Philippe,
>
> It is just the full patch. Currently, the implementation of HAXM is simple, we 
> did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the 
> xcr0 state within the kernel space, including initialization, update, etc. This 
> patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, 
> which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is 
> invoked. We have verified the patched QEMU and it can launch all guest OSes. 
> Thanks for your comments.
>
>
> Best Regards,
> Wenchao
>
> -----Original Message-----
> From: Philippe Mathieu-Daudé <philmd@linaro.org>
> Sent: Friday, November 25, 2022 21:37
> To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org
> Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com>
> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support
>
> Hi,
>
> On 25/11/22 13:18, Wang, Wenchao wrote:
> > Hi, maintainers,
> >
> > As HAXM v7.8.0 is released and it added XCR0 support, could you help
> > to merge this patch to add corresponding support into HAX user space
> > of QEMU? The patch has been included in the attachment. Thanks.
>
> See
> https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches
> on how to send patches to a mailing list.
>
> > Best Regards,
> >
> > Wenchao
> >
> >   From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00
> > 2001
> >
> > From: Wenchao Wang <wenchao.wang@intel.com>
> >
> > Date: Fri, 25 Nov 2022 18:37:34 +0800
> >
> > Subject: [PATCH] target/i386/hax: Add XCR0 support
> >
> > Introduce extended control register XCR0 to support XSAVE feature set.
> >
> > Note: This change requires at least HAXM v7.8.0 to support.
> >
> > Reviewed-by: Hang Yuan <hang.yuan@intel.com>
> >
> > Signed-off-by: Wenchao Wang <wenchao.wang@intel.com>
> >
> > ---
> >
> > target/i386/hax/hax-interface.h | 2 ++
> >
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/target/i386/hax/hax-interface.h
> > b/target/i386/hax/hax-interface.h
> >
> > index 537ae084e9..1d13bb2380 100644
> >
> > --- a/target/i386/hax/hax-interface.h
> >
> > +++ b/target/i386/hax/hax-interface.h
> >
> > @@ -201,6 +201,8 @@ struct vcpu_state_t {
> >
> >        uint64_t _cr3;
> >
> >        uint64_t _cr4;
> >
> > +    uint64_t _xcr0;
> >
> > +
> >
> >        uint64_t _dr0;
> >
> >        uint64_t _dr1;
> >
> >        uint64_t _dr2;
> >
> > --
> >
> > 2.17.1
>
> Is that the full patch? It is missing the register use in 
> hax_sync_vcpu_register()...
>
> Regards,
>
> Phil.