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Re: [PATCH 6/6] hw/arm: Allwinner A10 enable SPL load from MMC


From: Strahinja Jankovic
Subject: Re: [PATCH 6/6] hw/arm: Allwinner A10 enable SPL load from MMC
Date: Thu, 8 Dec 2022 20:22:59 +0100

On Wed, Dec 7, 2022 at 11:39 PM Niek Linnenbank
<nieklinnenbank@gmail.com> wrote:
>
> Hi Strahinja,
>
>
> On Sun, Dec 4, 2022 at 12:19 AM Strahinja Jankovic 
> <strahinjapjankovic@gmail.com> wrote:
>>
>> This patch enables copying of SPL from MMC if `-kernel` parameter is not
>> passed when starting QEMU. SPL is copied to SRAM_A.
>>
>> The approach is reused from Allwinner H3 implementation.
>>
>> Tested with Armbian and custom Yocto image.
>>
>> Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com>
>> ---
>>  hw/arm/allwinner-a10.c         | 18 ++++++++++++++++++
>>  hw/arm/cubieboard.c            |  5 +++++
>>  include/hw/arm/allwinner-a10.h | 21 +++++++++++++++++++++
>>  3 files changed, 44 insertions(+)
>>
>> diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
>> index 17e439777e..dc1966ff7a 100644
>> --- a/hw/arm/allwinner-a10.c
>> +++ b/hw/arm/allwinner-a10.c
>> @@ -24,7 +24,9 @@
>>  #include "sysemu/sysemu.h"
>>  #include "hw/boards.h"
>>  #include "hw/usb/hcd-ohci.h"
>> +#include "hw/loader.h"
>>
>> +#define AW_A10_SRAM_A_BASE      0x00000000
>>  #define AW_A10_DRAMC_BASE       0x01c01000
>>  #define AW_A10_MMC0_BASE        0x01c0f000
>>  #define AW_A10_CCM_BASE         0x01c20000
>> @@ -38,6 +40,22 @@
>>  #define AW_A10_RTC_BASE         0x01c20d00
>>  #define AW_A10_I2C0_BASE        0x01c2ac00
>>
>> +void allwinner_a10_bootrom_setup(AwA10State *s, BlockBackend *blk)
>> +{
>> +    const int64_t rom_size = 32 * KiB;
>> +    g_autofree uint8_t *buffer = g_new0(uint8_t, rom_size);
>> +
>> +    if (blk_pread(blk, 8 * KiB, rom_size, buffer, 0) < 0) {
>> +        error_setg(&error_fatal, "%s: failed to read BlockBackend data",
>> +                   __func__);
>> +        return;
>> +    }
>> +
>> +    rom_add_blob("allwinner-a10.bootrom", buffer, rom_size,
>> +                  rom_size, AW_A10_SRAM_A_BASE,
>> +                  NULL, NULL, NULL, NULL, false);
>> +}
>
>
> Its probably fine for now to do it in the same way here for the A10 indeed. 
> Perhaps in the future, we can try
> to share some overlapping code between the A10 and H3.

That definitely makes sense. I plan on submitting support for A20
after this patch set, so maybe that would be a good opportunity to
refactor the Allwinner support in QEMU.

Best regards,
Strahinja


>
> So the patch looks fine to me:
> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com>
>
> Regards,
> Niek
>
>>
>> +
>>  static void aw_a10_init(Object *obj)
>>  {
>>      AwA10State *s = AW_A10(obj);
>> diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
>> index afc7980414..37659c35fd 100644
>> --- a/hw/arm/cubieboard.c
>> +++ b/hw/arm/cubieboard.c
>> @@ -99,6 +99,11 @@ static void cubieboard_init(MachineState *machine)
>>      memory_region_add_subregion(get_system_memory(), AW_A10_SDRAM_BASE,
>>                                  machine->ram);
>>
>> +    /* Load target kernel or start using BootROM */
>> +    if (!machine->kernel_filename && blk && blk_is_available(blk)) {
>> +        /* Use Boot ROM to copy data from SD card to SRAM */
>> +        allwinner_a10_bootrom_setup(a10, blk);
>> +    }
>>      /* TODO create and connect IDE devices for ide_drive_get() */
>>
>>      cubieboard_binfo.ram_size = machine->ram_size;
>> diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h
>> index 763935fca9..b3c9ed24c7 100644
>> --- a/include/hw/arm/allwinner-a10.h
>> +++ b/include/hw/arm/allwinner-a10.h
>> @@ -15,6 +15,7 @@
>>  #include "hw/misc/allwinner-a10-ccm.h"
>>  #include "hw/misc/allwinner-a10-dramc.h"
>>  #include "hw/i2c/allwinner-i2c.h"
>> +#include "sysemu/block-backend.h"
>>
>>  #include "target/arm/cpu.h"
>>  #include "qom/object.h"
>> @@ -47,4 +48,24 @@ struct AwA10State {
>>      OHCISysBusState ohci[AW_A10_NUM_USB];
>>  };
>>
>> +/**
>> + * Emulate Boot ROM firmware setup functionality.
>> + *
>> + * A real Allwinner A10 SoC contains a Boot ROM
>> + * which is the first code that runs right after
>> + * the SoC is powered on. The Boot ROM is responsible
>> + * for loading user code (e.g. a bootloader) from any
>> + * of the supported external devices and writing the
>> + * downloaded code to internal SRAM. After loading the SoC
>> + * begins executing the code written to SRAM.
>> + *
>> + * This function emulates the Boot ROM by copying 32 KiB
>> + * of data from the given block device and writes it to
>> + * the start of the first internal SRAM memory.
>> + *
>> + * @s: Allwinner A10 state object pointer
>> + * @blk: Block backend device object pointer
>> + */
>> +void allwinner_a10_bootrom_setup(AwA10State *s, BlockBackend *blk);
>> +
>>  #endif
>> --
>> 2.30.2
>>
>
>
> --
> Niek Linnenbank
>



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