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[PATCH v4 20/27] tcg/s390x: Create tgen_cmp2 to simplify movcond
From: |
Richard Henderson |
Subject: |
[PATCH v4 20/27] tcg/s390x: Create tgen_cmp2 to simplify movcond |
Date: |
Thu, 8 Dec 2022 20:05:23 -0600 |
Return both regular and inverted condition codes from tgen_cmp2.
This lets us choose after the fact which comparision we want.
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target.c.inc | 19 ++++++++++++++++---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index bab2d679c2..a9e3b4a9b9 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -1207,10 +1207,11 @@ static void tgen_xori(TCGContext *s, TCGReg dest,
uint64_t val)
}
}
-static int tgen_cmp(TCGContext *s, TCGType type, TCGCond c, TCGReg r1,
- TCGArg c2, bool c2const, bool need_carry)
+static int tgen_cmp2(TCGContext *s, TCGType type, TCGCond c, TCGReg r1,
+ TCGArg c2, bool c2const, bool need_carry, int *inv_cc)
{
bool is_unsigned = is_unsigned_cond(c);
+ TCGCond inv_c = tcg_invert_cond(c);
S390Opcode op;
if (c2const) {
@@ -1221,6 +1222,7 @@ static int tgen_cmp(TCGContext *s, TCGType type, TCGCond
c, TCGReg r1,
} else {
tcg_out_insn(s, RRE, LTGR, r1, r1);
}
+ *inv_cc = tcg_cond_to_ltr_cond[inv_c];
return tcg_cond_to_ltr_cond[c];
}
}
@@ -1263,9 +1265,17 @@ static int tgen_cmp(TCGContext *s, TCGType type, TCGCond
c, TCGReg r1,
}
exit:
+ *inv_cc = tcg_cond_to_s390_cond[inv_c];
return tcg_cond_to_s390_cond[c];
}
+static int tgen_cmp(TCGContext *s, TCGType type, TCGCond c, TCGReg r1,
+ TCGArg c2, bool c2const, bool need_carry)
+{
+ int inv_cc;
+ return tgen_cmp2(s, type, c, r1, c2, c2const, need_carry, &inv_cc);
+}
+
static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,
TCGReg dest, TCGReg c1, TCGArg c2, int c2const)
{
@@ -1348,7 +1358,10 @@ static void tgen_movcond(TCGContext *s, TCGType type,
TCGCond c, TCGReg dest,
TCGReg c1, TCGArg c2, int c2const,
TCGArg v3, int v3const)
{
- int cc = tgen_cmp(s, type, c, c1, c2, c2const, false);
+ int cc, inv_cc;
+
+ cc = tgen_cmp2(s, type, c, c1, c2, c2const, false, &inv_cc);
+
if (v3const) {
tcg_out_insn(s, RIEg, LOCGHI, dest, v3, cc);
} else {
--
2.34.1
- [PATCH v4 13/27] tcg/s390x: Distinguish RIE formats, (continued)
- [PATCH v4 13/27] tcg/s390x: Distinguish RIE formats, Richard Henderson, 2022/12/08
- [PATCH v4 16/27] tcg/s390x: Issue XILF directly for xor_i32, Richard Henderson, 2022/12/08
- [PATCH v4 15/27] tcg/s390x: Support MIE2 MGRK instruction, Richard Henderson, 2022/12/08
- [PATCH v4 17/27] tcg/s390x: Tighten constraints for or_i64 and xor_i64, Richard Henderson, 2022/12/08
- [PATCH v4 18/27] tcg/s390x: Tighten constraints for and_i64, Richard Henderson, 2022/12/08
- [PATCH v4 19/27] tcg/s390x: Support MIE3 logical operations, Richard Henderson, 2022/12/08
- [PATCH v4 14/27] tcg/s390x: Support MIE2 multiply single instructions, Richard Henderson, 2022/12/08
- [PATCH v4 20/27] tcg/s390x: Create tgen_cmp2 to simplify movcond,
Richard Henderson <=
- [PATCH v4 21/27] tcg/s390x: Generalize movcond implementation, Richard Henderson, 2022/12/08
- [PATCH v4 22/27] tcg/s390x: Support SELGR instruction in movcond, Richard Henderson, 2022/12/08
- [PATCH v4 23/27] tcg/s390x: Use tgen_movcond_int in tgen_clz, Richard Henderson, 2022/12/08
- [PATCH v4 24/27] tcg/s390x: Implement ctpop operation, Richard Henderson, 2022/12/08
- [PATCH v4 25/27] tcg/s390x: Tighten constraints for 64-bit compare, Richard Henderson, 2022/12/08
- [PATCH v4 27/27] tcg/s390x: Avoid the constant pool in tcg_out_movi, Richard Henderson, 2022/12/08