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From: | Richard Henderson |
Subject: | Re: [PATCH-for-8.0 5/7] hw/mips/bootloader: Implement nanoMIPS SW opcode |
Date: | Sun, 11 Dec 2022 10:24:50 -0600 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 |
On 12/10/22 10:02, Philippe Mathieu-Daudé wrote:
On 10/12/22 16:55, Philippe Mathieu-Daudé wrote:Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/mips/bootloader.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 997e74ee52..cc3df385df 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -150,9 +150,31 @@ static void bl_gen_lui(void **p, bl_reg rt, uint32_t imm32) } } +static void bl_gen_ori_nm(void **ptr, bl_reg rt, bl_reg rs, uint16_t imm) +{ + uint16_t *p = (uint16_t *)*ptr; + uint32_t insn = 0;Similarly, we should check whether imm fits in 12-bit.
I think you should simply split at the "li" level instead of lui+ori. r~
+ insn = deposit32(insn, 26, 6, 0b100000); + insn = deposit32(insn, 21, 5, rt); + insn = deposit32(insn, 16, 5, rs); + insn = deposit32(insn, 0, 12, imm); + + stw_p(p, insn >> 16); + p++; + stw_p(p, insn >> 0); + p++; + + *ptr = p; +}
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