[PATCH v2 0/7] hw/mips: Make gt64xxx_pci.c endian-agnostic

[Philippe Mathieu-Daudé]

Patches missing review: 3 & 4

Respining an old/unfinished series... Add the 'cpu-little-endian'
qdev property to the GT64120 north bridge so [target-specific]
machines can set its endianness, allowing it to be endian agnostic.

Since v1:
- use DEFINE_PROP_BOOL (Richard)
- use R_GT_CPU_Endianness_MASK instead of deposit32 (Richard)
- keep qdev_prop_set_bit() for QOM boolean
  (there is no qdev_prop_set_bool, object_property_set_bool
  seems overkill here).

Philippe Mathieu-Daudé (7):
  hw/mips/Kconfig: Introduce CONFIG_GT64120 to select gt64xxx_pci.c
  hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole
  hw/mips/gt64xxx_pci: Manage endian bits with the RegisterFields API
  hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property
  hw/mips/malta: Explicit GT64120 endianness upon device creation
  hw/mips/meson: Make gt64xxx_pci.c endian-agnostic
  hw/mips/gt64xxx_pci: Move it to hw/pci-host/

 MAINTAINERS                                   |  2 +-
 configs/devices/mips-softmmu/common.mak       |  1 -
 hw/mips/Kconfig                               |  1 +
 hw/mips/malta.c                               | 11 ++--
 hw/mips/meson.build                           |  2 +-
 hw/mips/trace-events                          |  6 ---
 hw/pci-host/Kconfig                           |  6 +++
 hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 52 +++++++++++++------
 hw/pci-host/meson.build                       |  1 +
 hw/pci-host/trace-events                      |  7 +++
 meson.build                                   |  1 -
 11 files changed, 57 insertions(+), 33 deletions(-)
 delete mode 100644 hw/mips/trace-events
 rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (96%)

-- 
2.38.1