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Re: [PATCH 4/9] hw/arm/aspeed_ast10x0: Map I3C peripheral


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH 4/9] hw/arm/aspeed_ast10x0: Map I3C peripheral
Date: Fri, 30 Dec 2022 08:07:55 +0100
User-agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.6.1

On 29/12/22 21:46, Peter Delevoryas wrote:
On Thu, Dec 29, 2022 at 04:23:20PM +0100, Philippe Mathieu-Daudé wrote:
Since I don't have access to the datasheet, the relevant
values were found in:
https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
  hw/arm/aspeed_ast10x0.c | 16 ++++++++++++++++
  1 file changed, 16 insertions(+)


@@ -240,6 +244,18 @@ static void aspeed_soc_ast1030_realize(DeviceState 
*dev_soc, Error **errp)
          sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq);
      }
+ /* I3C */
+    if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) {
+        return;
+    }
+    aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]);
+    for (i = 0; i < ASPEED_I3C_NR_DEVICES; i++) {
+        qemu_irq irq = qdev_get_gpio_in(DEVICE(&s->armv7m),
+                                        sc->irqmap[ASPEED_DEV_I3C] + i);
+        /* The AST1030 I2C controller has one IRQ per bus. */

Should this comment be I2C or I3C?

Oops indeed, copy/paste leftover :)

Reviewed-by: Peter Delevoryas <peter@pjd.dev>

Thanks!




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