qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH v4 0/3] Add irq number property for loongarch pch interrupt contr


From: Tianrui Zhao
Subject: [PATCH v4 0/3] Add irq number property for loongarch pch interrupt controller
Date: Fri, 30 Dec 2022 17:59:47 +0800

This series add irq number property for loongarch pch_msi
and pch_pic interrupt controller.

Changes for v4:
(1) Change the default irq number of pch pic to 32.
(2) Change the default irq number of pch msi to 224(256 - 32).
(3) Move the 'PCH_PIC_IRQ_NUM' macro to pci-host/ls7a.h
    and add prefix 'VIRT' on it to keep standard format.

Changes for v3:
(1) Fix the valid range of msi_irq_num, it will trigger error_setg() when
irq_num is invalid.
(2) Using g_new() to alloc msi_irqs when pch_msi realize.
(3) Using EXTIOI_IRQS macro to replace the 256 irq number.

Changes for v2:
(1) Free pch_msi_irq array in pch_msi_unrealize().

Changes for v1:
(1) Add irq number property for loongarch_pch_msi.
(2) Add irq number property for loongarch_pch_pic.

Tianrui Zhao (3):
  hw/intc/loongarch_pch_msi: add irq number property
  hw/intc/loongarch_pch_pic: add irq number property
  hw/intc/loongarch_pch: Change default irq number of pch irq controller

 hw/intc/loongarch_pch_msi.c         | 33 +++++++++++++++++++++++++---
 hw/intc/loongarch_pch_pic.c         | 34 +++++++++++++++++++++++++----
 hw/loongarch/virt.c                 | 19 ++++++++++------
 include/hw/intc/loongarch_pch_msi.h |  9 ++++----
 include/hw/intc/loongarch_pch_pic.h |  6 ++---
 include/hw/pci-host/ls7a.h          |  2 +-
 6 files changed, 80 insertions(+), 23 deletions(-)

-- 
2.31.1




reply via email to

[Prev in Thread] Current Thread [Next in Thread]