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[PULL 00/29] target-arm queue
From: |
Peter Maydell |
Subject: |
[PULL 00/29] target-arm queue |
Date: |
Mon, 1 Jul 2024 17:07:00 +0100 |
The following changes since commit b6d32a06fc0984e537091cba08f2e1ed9f775d74:
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into
staging (2024-06-30 16:12:24 -0700)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20240701
for you to fetch changes up to 58c782de557beb496bfb4c5ade721bbbd2480c72:
tests/qtest: Ensure STM32L4x5 EXTI state is correct at the end of QTests
(2024-07-01 15:40:54 +0100)
----------------------------------------------------------------
target-arm queue:
* tests/avocado: update firmware for sbsa-ref and use all cores
* hw/arm/smmu-common: Replace smmu_iommu_mr with smmu_find_sdev
* arm: Fix VCMLA Dd, Dn, Dm[idx]
* arm: Fix SQDMULH (by element) with Q=0
* arm: Fix FJCVTZS vs flush-to-zero
* arm: More conversion of A64 AdvSIMD to decodetree
* arm: Enable FEAT_Debugv8p8 for -cpu max
* MAINTAINERS: Update family name for Patrick Leis
* hw/arm/xilinx_zynq: Add boot-mode property
* docs/system/arm: Add a doc for zynq board
* hw/misc: In STM32L4x5 EXTI, correct configurable interrupts
* tests/qtest: fix minor issues in STM32L4x5 tests
----------------------------------------------------------------
Gustavo Romero (3):
target/arm: Fix indentation
target/arm: Move initialization of debug ID registers
target/arm: Enable FEAT_Debugv8p8 for -cpu max
Inès Varhol (3):
tests/qtest: Fix STM32L4x5 SYSCFG irq line 15 state assumption
hw/misc: In STM32L4x5 EXTI, correct configurable interrupts
tests/qtest: Ensure STM32L4x5 EXTI state is correct at the end of QTests
Marcin Juszkiewicz (2):
tests/avocado: update firmware for sbsa-ref
tests/avocado: use default amount of cores on sbsa-ref
Nicolin Chen (1):
hw/arm/smmu-common: Replace smmu_iommu_mr with smmu_find_sdev
Patrick Leis (1):
MAINTAINERS: Update my family name
Rayhan Faizel (3):
hw/nvram: Add BCM2835 OTP device
hw/arm: Connect OTP device to BCM2835
hw/misc: Implement mailbox properties for customer OTP and device
specific private keys
Richard Henderson (13):
target/arm: Fix VCMLA Dd, Dn, Dm[idx]
target/arm: Fix SQDMULH (by element) with Q=0
target/arm: Fix FJCVTZS vs flush-to-zero
target/arm: Convert SQRDMLAH, SQRDMLSH to decodetree
target/arm: Convert SDOT, UDOT to decodetree
target/arm: Convert SUDOT, USDOT to decodetree
target/arm: Convert BFDOT to decodetree
target/arm: Convert BFMLALB, BFMLALT to decodetree
target/arm: Convert BFMMLA, SMMLA, UMMLA, USMMLA to decodetree
target/arm: Add data argument to do_fp3_vector
target/arm: Convert FCADD to decodetree
target/arm: Convert FCMLA to decodetree
target/arm: Delete dead code from disas_simd_indexed
Sai Pavan Boddu (3):
hw/misc/zynq_slcr: Add boot-mode property
hw/arm/xilinx_zynq: Add boot-mode property
docs/system/arm: Add a doc for zynq board
MAINTAINERS | 3 +-
docs/system/arm/emulation.rst | 1 +
docs/system/arm/xlnx-zynq.rst | 47 ++
docs/system/target-arm.rst | 1 +
include/hw/arm/bcm2835_peripherals.h | 3 +-
include/hw/arm/raspberrypi-fw-defs.h | 2 +
include/hw/arm/smmu-common.h | 4 +-
include/hw/misc/bcm2835_property.h | 2 +
include/hw/misc/stm32l4x5_exti.h | 2 +
include/hw/nvram/bcm2835_otp.h | 68 +++
target/arm/cpu.h | 2 +
target/arm/helper.h | 10 +
target/arm/tcg/a64.decode | 43 ++
hw/arm/bcm2835_peripherals.c | 15 +-
hw/arm/smmu-common.c | 8 +-
hw/arm/smmuv3.c | 12 +-
hw/arm/xilinx_zynq.c | 31 ++
hw/misc/bcm2835_property.c | 87 ++++
hw/misc/stm32l4x5_exti.c | 28 +-
hw/misc/zynq_slcr.c | 22 +-
hw/nvram/bcm2835_otp.c | 187 +++++++
target/arm/tcg/cpu32.c | 35 +-
target/arm/tcg/cpu64.c | 4 +-
target/arm/tcg/translate-a64.c | 808 ++++++++++---------------------
target/arm/tcg/vec_helper.c | 100 +++-
target/arm/vfp_helper.c | 18 +-
tests/qtest/stm32l4x5_exti-test.c | 8 +
tests/qtest/stm32l4x5_syscfg-test.c | 16 +-
tests/tcg/aarch64/test-2375.c | 21 +
hw/nvram/meson.build | 1 +
tests/avocado/machine_aarch64_sbsaref.py | 16 +-
tests/tcg/aarch64/Makefile.target | 3 +-
32 files changed, 967 insertions(+), 641 deletions(-)
create mode 100644 docs/system/arm/xlnx-zynq.rst
create mode 100644 include/hw/nvram/bcm2835_otp.h
create mode 100644 hw/nvram/bcm2835_otp.c
create mode 100644 tests/tcg/aarch64/test-2375.c
- [PULL 00/29] target-arm queue,
Peter Maydell <=
- [PULL 05/29] tests/avocado: use default amount of cores on sbsa-ref, Peter Maydell, 2024/07/01
- [PULL 03/29] hw/misc: Implement mailbox properties for customer OTP and device specific private keys, Peter Maydell, 2024/07/01
- [PULL 26/29] docs/system/arm: Add a doc for zynq board, Peter Maydell, 2024/07/01
- [PULL 01/29] hw/nvram: Add BCM2835 OTP device, Peter Maydell, 2024/07/01
- [PULL 07/29] target/arm: Fix VCMLA Dd, Dn, Dm[idx], Peter Maydell, 2024/07/01
- [PULL 10/29] target/arm: Convert SQRDMLAH, SQRDMLSH to decodetree, Peter Maydell, 2024/07/01
- [PULL 04/29] tests/avocado: update firmware for sbsa-ref, Peter Maydell, 2024/07/01
- [PULL 02/29] hw/arm: Connect OTP device to BCM2835, Peter Maydell, 2024/07/01
- [PULL 08/29] target/arm: Fix SQDMULH (by element) with Q=0, Peter Maydell, 2024/07/01
- [PULL 14/29] target/arm: Convert BFMLALB, BFMLALT to decodetree, Peter Maydell, 2024/07/01