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[PULL 26/29] docs/system/arm: Add a doc for zynq board
From: |
Peter Maydell |
Subject: |
[PULL 26/29] docs/system/arm: Add a doc for zynq board |
Date: |
Mon, 1 Jul 2024 17:07:26 +0100 |
From: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Added the supported device list and an example command.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-id: 20240621125906.1300995-4-sai.pavan.boddu@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
MAINTAINERS | 1 +
docs/system/arm/xlnx-zynq.rst | 47 +++++++++++++++++++++++++++++++++++
docs/system/target-arm.rst | 1 +
3 files changed, 49 insertions(+)
create mode 100644 docs/system/arm/xlnx-zynq.rst
diff --git a/MAINTAINERS b/MAINTAINERS
index 13255d4a3bd..6725913c8b3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1033,6 +1033,7 @@ F: hw/adc/zynq-xadc.c
F: include/hw/misc/zynq_slcr.h
F: include/hw/adc/zynq-xadc.h
X: hw/ssi/xilinx_*
+F: docs/system/arm/xlnx-zynq.rst
Xilinx ZynqMP and Versal
M: Alistair Francis <alistair@alistair23.me>
diff --git a/docs/system/arm/xlnx-zynq.rst b/docs/system/arm/xlnx-zynq.rst
new file mode 100644
index 00000000000..ade18a3fe13
--- /dev/null
+++ b/docs/system/arm/xlnx-zynq.rst
@@ -0,0 +1,47 @@
+Xilinx Zynq board (``xilinx-zynq-a9``)
+======================================
+The Zynq 7000 family is based on the AMD SoC architecture. These products
+integrate a feature-rich dual or single-core Arm Cortex-A9 MPCore based
+processing system (PS) and AMD programmable logic (PL) in a single device.
+
+More details here:
+https://docs.amd.com/r/en-US/ug585-zynq-7000-SoC-TRM/Zynq-7000-SoC-Technical-Reference-Manual
+
+QEMU xilinx-zynq-a9 board supports following devices:
+ - A9 MPCORE
+ - cortex-a9
+ - GIC v1
+ - Generic timer
+ - wdt
+ - OCM 256KB
+ - SMC SRAM@0xe2000000 64MB
+ - Zynq SLCR
+ - SPI x2
+ - QSPI
+ - UART
+ - TTC x2
+ - Gigabit Ethernet Controller x2
+ - SD Controller x2
+ - XADC
+ - Arm PrimeCell DMA Controller
+ - DDR Memory
+ - USB 2.0 x2
+
+Running
+"""""""
+Direct Linux boot of a generic ARM upstream Linux kernel:
+
+.. code-block:: bash
+
+ $ qemu-system-aarch64 -M xilinx-zynq-a9 \
+ -dtb zynq-zc702.dtb -serial null -serial mon:stdio \
+ -display none -m 1024 \
+ -initrd rootfs.cpio.gz -kernel zImage
+
+For configuring the boot-mode provide the following on the command line:
+
+.. code-block:: bash
+
+ -machine boot-mode=qspi
+
+Supported values are jtag, sd, qspi, nor.
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
index 870d30e3502..7b992722846 100644
--- a/docs/system/target-arm.rst
+++ b/docs/system/target-arm.rst
@@ -109,6 +109,7 @@ undocumented; you can get a complete list by running
arm/virt
arm/xenpvh
arm/xlnx-versal-virt
+ arm/xlnx-zynq
Emulated CPU architecture support
=================================
--
2.34.1
- [PULL 00/29] target-arm queue, Peter Maydell, 2024/07/01
- [PULL 05/29] tests/avocado: use default amount of cores on sbsa-ref, Peter Maydell, 2024/07/01
- [PULL 03/29] hw/misc: Implement mailbox properties for customer OTP and device specific private keys, Peter Maydell, 2024/07/01
- [PULL 26/29] docs/system/arm: Add a doc for zynq board,
Peter Maydell <=
- [PULL 01/29] hw/nvram: Add BCM2835 OTP device, Peter Maydell, 2024/07/01
- [PULL 07/29] target/arm: Fix VCMLA Dd, Dn, Dm[idx], Peter Maydell, 2024/07/01
- [PULL 10/29] target/arm: Convert SQRDMLAH, SQRDMLSH to decodetree, Peter Maydell, 2024/07/01
- [PULL 04/29] tests/avocado: update firmware for sbsa-ref, Peter Maydell, 2024/07/01
- [PULL 02/29] hw/arm: Connect OTP device to BCM2835, Peter Maydell, 2024/07/01
- [PULL 08/29] target/arm: Fix SQDMULH (by element) with Q=0, Peter Maydell, 2024/07/01
- [PULL 14/29] target/arm: Convert BFMLALB, BFMLALT to decodetree, Peter Maydell, 2024/07/01
- [PULL 06/29] hw/arm/smmu-common: Replace smmu_iommu_mr with smmu_find_sdev, Peter Maydell, 2024/07/01
- [PULL 21/29] target/arm: Move initialization of debug ID registers, Peter Maydell, 2024/07/01
- [PULL 11/29] target/arm: Convert SDOT, UDOT to decodetree, Peter Maydell, 2024/07/01