Re: [PATCH v1 0/8] PRI support for VT-d

[cmd]

On 05/07/2024 08:20, Yi Liu wrote:
> On 2024/7/5 13:13, CLEMENT MATHIEU--DRIF wrote:
> > On 05/07/2024 05:03, Yi Liu wrote:
> > > Caution: External email. Do not open attachments or click links,
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> > >
> > >
> > > On 2024/5/30 20:24, CLEMENT MATHIEU--DRIF wrote:
> > > > This series belongs to a list of series that add SVM support for VT-d.
> > > >
> > > > Here we focus on the implementation of PRI support in the IOMMU and
> > > > on a PCI-level
> > > > API for PRI to be used by virtual devices.
> > > >
> > > > This work is based on the VT-d specification version 4.1 (March 2023).
> > > > Here is a link to a GitHub repository where you can find the
> > > > following elements :
> > > >       - Qemu with all the patches for SVM
> > > >           - ATS
> > > >           - PRI
> > > >           - Device IOTLB invalidations
> > > >           - Requests with already translated addresses
> > > >       - A demo device
> > > >       - A simple driver for the demo device
> > > >       - A userspace program (for testing and demonstration purposes)
> > >
> > > I didn't see the drain PRQ related logics in this series. Please 
> > > consider
> > > adding it in next version. It's needed when repurposing a PASID.
> >
> > Hi,
> >
> > Are you talking about wait descriptors with SW = 0, IF = 0, FN = 1
> > (section 7.10 of VT-d)?
> >
> > I'll move that to the PRI series.
>
> yes. But not only that patch. When guest software submitting the
> descriptors per CH7.10 of VT-d spec, QEMU need to emulate the
> PRQ drain behavior.
Ok, will check
> > > > https://github.com/BullSequana/Qemu-in-guest-SVM-demo
> > > >
> > > >
> > > > Clément Mathieu--Drif (8):
> > > >     pcie: add a helper to declare the PRI capability for a pcie device
> > > >     pcie: helper functions to check to check if PRI is enabled
> > > >     pcie: add a way to get the outstanding page request allocation 
> > > > (pri)
> > > >       from the config space.
> > > >     pci: declare structures and IOMMU operation for PRI
> > > >     pci: add a PCI-level API for PRI
> > > >     intel_iommu: declare PRI constants and structures
> > > >     intel_iommu: declare registers for PRI
> > > >     intel_iommu: add PRI operations support
> > > >
> > > >    hw/i386/intel_iommu.c          | 302 
> > > > +++++++++++++++++++++++++++++++++
> > > >    hw/i386/intel_iommu_internal.h |  54 +++++-
> > > >    hw/pci/pci.c                   |  37 ++++
> > > >    hw/pci/pcie.c                  |  42 +++++
> > > >    include/exec/memory.h          |  65 +++++++
> > > >    include/hw/pci/pci.h           |  45 +++++
> > > >    include/hw/pci/pci_bus.h       |   1 +
> > > >    include/hw/pci/pcie.h          |   7 +-
> > > >    include/hw/pci/pcie_regs.h     |   4 +
> > > >    system/memory.c                |  49 ++++++
> > > >    10 files changed, 604 insertions(+), 2 deletions(-)
> > >
> > > --
> > > Regards,
> > > Yi Liu