[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v2 2/9] hw/riscv/virt-acpi-build.c: Update the HID of RISC-V
From: |
Igor Mammedov |
Subject: |
Re: [PATCH v2 2/9] hw/riscv/virt-acpi-build.c: Update the HID of RISC-V UART |
Date: |
Thu, 11 Jul 2024 15:25:12 +0200 |
On Mon, 8 Jul 2024 17:17:34 +0530
Sunil V L <sunilvl@ventanamicro.com> wrote:
> The RISC-V BRS specification [1] requires NS16550 compatible UART to
> have the HID RSCV0003. So, update the HID for the UART.
>
> [1] - https://github.com/riscv-non-isa/riscv-brs
it point's repo with a bunch of files,
please make it easier for reader to find
aka point to concrete document + title (for when link goes stale)
and chapter. (similar to what we do for when documenting ACPI code)
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Acked-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> hw/riscv/virt-acpi-build.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index 87fe882af0..939f951e45 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -192,7 +192,7 @@ acpi_dsdt_add_uart(Aml *scope, const MemMapEntry
> *uart_memmap,
> uint32_t uart_irq)
> {
> Aml *dev = aml_device("COM0");
> - aml_append(dev, aml_name_decl("_HID", aml_string("PNP0501")));
> + aml_append(dev, aml_name_decl("_HID", aml_string("RSCV0003")));
> aml_append(dev, aml_name_decl("_UID", aml_int(0)));
>
> Aml *crs = aml_resource_template();
- [PATCH v2 0/9] RISC-V: ACPI: Namespace updates, Sunil V L, 2024/07/08
- [PATCH v2 6/9] tests/qtest/bios-tables-test.c: Remove the fall back path, Sunil V L, 2024/07/08
- [PATCH v2 7/9] tests/acpi: Add empty ACPI data files for RISC-V, Sunil V L, 2024/07/08
- [PATCH v2 3/9] tests/acpi: Allow DSDT acpi table changes for aarch64, Sunil V L, 2024/07/08
- [PATCH v2 5/9] tests/acpi: update expected DSDT blob for aarch64 and microvm, Sunil V L, 2024/07/08
- [PATCH v2 8/9] tests/qtest/bios-tables-test.c: Enable basic testing for RISC-V, Sunil V L, 2024/07/08