[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL v2 6/8] target/loongarch: Remove avail_64 in trans_srai_w() and si
From: |
Song Gao |
Subject: |
[PULL v2 6/8] target/loongarch: Remove avail_64 in trans_srai_w() and simplify it |
Date: |
Fri, 12 Jul 2024 09:36:30 +0800 |
From: Feiyang Chen <chris.chenfeiyang@gmail.com>
Since srai.w is a valid instruction on la32, remove the avail_64 check
and simplify trans_srai_w().
Fixes: c0c0461e3a06 ("target/loongarch: Add avail_64 to check la64-only
instructions")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Feiyang Chen <chris.chenfeiyang@gmail.com>
Message-Id: <20240628033357.50027-1-chris.chenfeiyang@gmail.com>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
target/loongarch/tcg/insn_trans/trans_shift.c.inc | 15 +++------------
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/target/loongarch/tcg/insn_trans/trans_shift.c.inc
b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
index 2f4bd6ff28..377307785a 100644
--- a/target/loongarch/tcg/insn_trans/trans_shift.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
@@ -67,19 +67,9 @@ static void gen_rotr_d(TCGv dest, TCGv src1, TCGv src2)
tcg_gen_rotr_tl(dest, src1, t0);
}
-static bool trans_srai_w(DisasContext *ctx, arg_srai_w *a)
+static void gen_sari_w(TCGv dest, TCGv src1, target_long imm)
{
- TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
- TCGv src1 = gpr_src(ctx, a->rj, EXT_ZERO);
-
- if (!avail_64(ctx)) {
- return false;
- }
-
- tcg_gen_sextract_tl(dest, src1, a->imm, 32 - a->imm);
- gen_set_gpr(a->rd, dest, EXT_NONE);
-
- return true;
+ tcg_gen_sextract_tl(dest, src1, imm, 32 - imm);
}
TRANS(sll_w, ALL, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_sll_w)
@@ -94,6 +84,7 @@ TRANS(slli_w, ALL, gen_rri_c, EXT_NONE, EXT_SIGN,
tcg_gen_shli_tl)
TRANS(slli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shli_tl)
TRANS(srli_w, ALL, gen_rri_c, EXT_ZERO, EXT_SIGN, tcg_gen_shri_tl)
TRANS(srli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shri_tl)
+TRANS(srai_w, ALL, gen_rri_c, EXT_NONE, EXT_NONE, gen_sari_w)
TRANS(srai_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_sari_tl)
TRANS(rotri_w, 64, gen_rri_v, EXT_NONE, EXT_NONE, gen_rotr_w)
TRANS(rotri_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_rotri_tl)
--
2.34.1
- [PULL v2 0/8] loongarch-to-apply queue, Song Gao, 2024/07/11
- [PULL v2 4/8] MAINTAINERS: Add myself as a reviewer of LoongArch virt machine, Song Gao, 2024/07/11
- [PULL v2 5/8] target/loongarch/kvm: Add software breakpoint support, Song Gao, 2024/07/11
- [PULL v2 1/8] hw/loongarch/boot.c: fix out-of-bound reading, Song Gao, 2024/07/11
- [PULL v2 2/8] hw/loongarch: Change the tpm support by default, Song Gao, 2024/07/11
- [PULL v2 7/8] target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values, Song Gao, 2024/07/11
- [PULL v2 8/8] target/loongarch: Fix cpu_reset set wrong CSR_CRMD, Song Gao, 2024/07/11
- [PULL v2 3/8] hw/loongarch/virt: Remove unused assignment, Song Gao, 2024/07/11
- [PULL v2 6/8] target/loongarch: Remove avail_64 in trans_srai_w() and simplify it,
Song Gao <=
- Re: [PULL v2 0/8] loongarch-to-apply queue, Richard Henderson, 2024/07/12