Re: [PATCH v2 0/9] RISC-V: ACPI: Namespace updates

[Igor Mammedov]

On Mon,  8 Jul 2024 17:17:32 +0530
Sunil V L <sunilvl@ventanamicro.com> wrote:

> This series adds few updates to RISC-V ACPI namespace for virt platform.
> Additionally, it has patches to enable ACPI table testing for RISC-V.
> 
> 1) PCI Link devices need to be created outside the scope of the PCI root
> complex to ensure correct probe ordering by the OS. This matches the
> example given in ACPI spec as well.
> 
> 2) Add PLIC and APLIC as platform devices as well to ensure probing
> order as per BRS spec [1] requirement.
> 
> 3) BRS spec requires RISC-V to use new ACPI ID for the generic UART. So,
> update the HID of the UART.
> 
> 4) Enabled ACPI tables tests for RISC-V which were originally part of
> [2] but couldn't get merged due to updates required in the expected AML
> files. I think combining those patches with this series makes it easier
> to merge since expected AML files are updated.
> 
> [1] - https://github.com/riscv-non-isa/riscv-brs
> [2] - https://lists.gnu.org/archive/html/qemu-devel/2024-06/msg04734.html

btw: CI is not happy about series, see:
 https://gitlab.com/imammedo/qemu/-/pipelines/1371119552
also 'cross-i686-tci' job routinely timeouts on bios-tables-test
but we still keep adding more tests to it.
We should either bump timeout to account for slowness or
disable bios-tables-test for that job.


> Changes since v1:
>       1) Made changes in gpex-acpi.c generic as per feedback from
>          Michael. This changes the DSDT for aarch64/virt and microvm
>          machines. Hence, few patches are added to update the expected
>          DSDT files for those machine so that CI tests don't fail.
>       2) Added patches to enable ACPI tables tests for RISC-V
>          including a patch to remove the fallback path to
>          search for expected AML files.
>       3) Rebased and added tags.
> 
> Sunil V L (9):
>   hw/riscv/virt-acpi-build.c: Add namespace devices for PLIC and APLIC
>   hw/riscv/virt-acpi-build.c: Update the HID of RISC-V UART
>   tests/acpi: Allow DSDT acpi table changes for aarch64
>   acpi/gpex: Create PCI link devices outside PCI root bridge
>   tests/acpi: update expected DSDT blob for aarch64 and  microvm
>   tests/qtest/bios-tables-test.c: Remove the fall back path
>   tests/acpi: Add empty ACPI data files for RISC-V
>   tests/qtest/bios-tables-test.c: Enable basic testing for RISC-V
>   tests/acpi: Add expected ACPI AML files for RISC-V
> 
>  hw/pci-host/gpex-acpi.c                       |  13 ++---
>  hw/riscv/virt-acpi-build.c                    |  49 +++++++++++++++++-
>  tests/data/acpi/aarch64/virt/DSDT             | Bin 5196 -> 5196 bytes
>  .../data/acpi/aarch64/virt/DSDT.acpihmatvirt  | Bin 5282 -> 5282 bytes
>  tests/data/acpi/aarch64/virt/DSDT.memhp       | Bin 6557 -> 6557 bytes
>  tests/data/acpi/aarch64/virt/DSDT.pxb         | Bin 7679 -> 7679 bytes
>  tests/data/acpi/aarch64/virt/DSDT.topology    | Bin 5398 -> 5398 bytes
>  tests/data/acpi/riscv64/virt/APIC             | Bin 0 -> 116 bytes
>  tests/data/acpi/riscv64/virt/DSDT             | Bin 0 -> 3576 bytes
>  tests/data/acpi/riscv64/virt/FACP             | Bin 0 -> 276 bytes
>  tests/data/acpi/riscv64/virt/MCFG             | Bin 0 -> 60 bytes
>  tests/data/acpi/riscv64/virt/RHCT             | Bin 0 -> 332 bytes
>  tests/data/acpi/riscv64/virt/SPCR             | Bin 0 -> 80 bytes
>  tests/data/acpi/x86/microvm/DSDT.pcie         | Bin 3023 -> 3023 bytes
>  tests/qtest/bios-tables-test.c                |  40 +++++++++-----
>  15 files changed, 81 insertions(+), 21 deletions(-)
>  create mode 100644 tests/data/acpi/riscv64/virt/APIC
>  create mode 100644 tests/data/acpi/riscv64/virt/DSDT
>  create mode 100644 tests/data/acpi/riscv64/virt/FACP
>  create mode 100644 tests/data/acpi/riscv64/virt/MCFG
>  create mode 100644 tests/data/acpi/riscv64/virt/RHCT
>  create mode 100644 tests/data/acpi/riscv64/virt/SPCR
>