[PULL 00/26] target-arm queue

[Peter Maydell]

Hi; hopefully this is the last arm pullreq before softfreeze.
There's a handful of miscellaneous bug fixes here, but the
bulk of the pullreq is Mostafa's implementation of 2-stage
translation in the SMMUv3.

thanks
-- PMM

The following changes since commit d74ec4d7dda6322bcc51d1b13ccbd993d3574795:

  Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into 
staging (2024-07-18 10:07:23 +1000)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20240718

for you to fetch changes up to 30a1690f2402e6c1582d5b3ebcf7940bfe2fad4b:

  hvf: arm: Do not advance PC when raising an exception (2024-07-18 13:49:30 
+0100)

----------------------------------------------------------------
target-arm queue:
 * Fix handling of LDAPR/STLR with negative offset
 * LDAPR should honour SCTLR_ELx.nAA
 * Use float_status copy in sme_fmopa_s
 * hw/display/bcm2835_fb: fix fb_use_offsets condition
 * hw/arm/smmuv3: Support and advertise nesting
 * Use FPST_F16 for SME FMOPA (widening)
 * tests/arm-cpu-features: Do not assume PMU availability
 * hvf: arm: Do not advance PC when raising an exception

----------------------------------------------------------------
Akihiko Odaki (2):
      tests/arm-cpu-features: Do not assume PMU availability
      hvf: arm: Do not advance PC when raising an exception

Daniyal Khan (2):
      target/arm: Use float_status copy in sme_fmopa_s
      tests/tcg/aarch64: Add test cases for SME FMOPA (widening)

Mostafa Saleh (18):
      hw/arm/smmu-common: Add missing size check for stage-1
      hw/arm/smmu: Fix IPA for stage-2 events
      hw/arm/smmuv3: Fix encoding of CLASS in events
      hw/arm/smmu: Use enum for SMMU stage
      hw/arm/smmu: Split smmuv3_translate()
      hw/arm/smmu: Consolidate ASID and VMID types
      hw/arm/smmu: Introduce CACHED_ENTRY_TO_ADDR
      hw/arm/smmuv3: Translate CD and TT using stage-2 table
      hw/arm/smmu-common: Rework TLB lookup for nesting
      hw/arm/smmu-common: Add support for nested TLB
      hw/arm/smmu-common: Support nested translation
      hw/arm/smmu: Support nesting in smmuv3_range_inval()
      hw/arm/smmu: Introduce smmu_iotlb_inv_asid_vmid
      hw/arm/smmu: Support nesting in the rest of commands
      hw/arm/smmuv3: Support nested SMMUs in smmuv3_notify_iova()
      hw/arm/smmuv3: Handle translation faults according to SMMUPTWEventInfo
      hw/arm/smmuv3: Support and advertise nesting
      hw/arm/smmu: Refactor SMMU OAS

Peter Maydell (2):
      target/arm: Fix handling of LDAPR/STLR with negative offset
      target/arm: LDAPR should honour SCTLR_ELx.nAA

Richard Henderson (1):
      target/arm: Use FPST_F16 for SME FMOPA (widening)

SamJakob (1):
      hw/display/bcm2835_fb: fix fb_use_offsets condition

 hw/arm/smmuv3-internal.h          |  19 +-
 include/hw/arm/smmu-common.h      |  46 +++-
 target/arm/tcg/a64.decode         |   2 +-
 hw/arm/smmu-common.c              | 312 ++++++++++++++++++++++---
 hw/arm/smmuv3.c                   | 467 +++++++++++++++++++++++++-------------
 hw/display/bcm2835_fb.c           |   2 +-
 target/arm/hvf/hvf.c              |   1 +
 target/arm/tcg/sme_helper.c       |   2 +-
 target/arm/tcg/translate-a64.c    |   2 +-
 target/arm/tcg/translate-sme.c    |  12 +-
 tests/qtest/arm-cpu-features.c    |  13 +-
 tests/tcg/aarch64/sme-fmopa-1.c   |  63 +++++
 tests/tcg/aarch64/sme-fmopa-2.c   |  56 +++++
 tests/tcg/aarch64/sme-fmopa-3.c   |  63 +++++
 hw/arm/trace-events               |  26 ++-
 tests/tcg/aarch64/Makefile.target |   5 +-
 16 files changed, 846 insertions(+), 245 deletions(-)
 create mode 100644 tests/tcg/aarch64/sme-fmopa-1.c
 create mode 100644 tests/tcg/aarch64/sme-fmopa-2.c
 create mode 100644 tests/tcg/aarch64/sme-fmopa-3.c