Set the default NaN pattern explicitly, and remove the ifdef from
parts64_default_nan().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/hppa/fpu_helper.c | 2 ++
fpu/softfloat-specialize.c.inc | 3 ---
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/hppa/fpu_helper.c b/target/hppa/fpu_helper.c
index 69c4ce37835..239c027ec52 100644
--- a/target/hppa/fpu_helper.c
+++ b/target/hppa/fpu_helper.c
@@ -65,6 +65,8 @@ void HELPER(loaded_fr0)(CPUHPPAState *env)
set_float_3nan_prop_rule(float_3nan_prop_abc, &env->fp_status);
/* For inf * 0 + NaN, return the input NaN */
set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->fp_status);
+ /* Default NaN: sign bit clear, msb-1 frac bit set */
+ set_float_default_nan_pattern(0b00100000, &env->fp_status);
}
void cpu_hppa_loaded_fr0(CPUHPPAState *env)
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
index 452fe378cd2..b5ec1944d15 100644
--- a/fpu/softfloat-specialize.c.inc
+++ b/fpu/softfloat-specialize.c.inc
@@ -139,9 +139,6 @@ static void parts64_default_nan(FloatParts64 *p,
float_status *status)
#if defined(TARGET_SPARC) || defined(TARGET_M68K)
/* Sign bit clear, all frac bits set */
dnan_pattern = 0b01111111;
-#elif defined(TARGET_HPPA)
- /* Sign bit clear, msb-1 frac bit set */
- dnan_pattern = 0b00100000;
#elif defined(TARGET_HEXAGON)
/* Sign bit set, all frac bits set. */
dnan_pattern = 0b11111111;