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[PATCH v3 6/7] aspeed/soc: Support SDHCI for AST2700
From: |
Jamin Lin |
Subject: |
[PATCH v3 6/7] aspeed/soc: Support SDHCI for AST2700 |
Date: |
Wed, 4 Dec 2024 16:05:22 +0800 |
Add SDHCI model for AST2700 SDHCI support. The SDHCI controller only support 1
slot and registers base address is start at 0x1408_0000 and its interrupt is
connected to GICINT133_INTC at bit 1.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 63d1fcb086..baddd35ecf 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -65,6 +65,7 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = {
[ASPEED_DEV_I2C] = 0x14C0F000,
[ASPEED_DEV_GPIO] = 0x14C0B000,
[ASPEED_DEV_RTC] = 0x12C0F000,
+ [ASPEED_DEV_SDHCI] = 0x14080000,
};
#define AST2700_MAX_IRQ 256
@@ -113,6 +114,7 @@ static const int aspeed_soc_ast2700_irqmap[] = {
[ASPEED_DEV_KCS] = 128,
[ASPEED_DEV_DP] = 28,
[ASPEED_DEV_I3C] = 131,
+ [ASPEED_DEV_SDHCI] = 133,
};
/* GICINT 128 */
@@ -158,6 +160,7 @@ static const int aspeed_soc_ast2700_gic132_intcmap[] = {
/* GICINT 133 */
static const int aspeed_soc_ast2700_gic133_intcmap[] = {
+ [ASPEED_DEV_SDHCI] = 1,
[ASPEED_DEV_PECI] = 4,
};
@@ -380,6 +383,14 @@ static void aspeed_soc_ast2700_init(Object *obj)
object_initialize_child(obj, "gpio", &s->gpio, typename);
object_initialize_child(obj, "rtc", &s->rtc, TYPE_ASPEED_RTC);
+
+ snprintf(typename, sizeof(typename), "aspeed.sdhci-%s", socname);
+ object_initialize_child(obj, "sd-controller", &s->sdhci, typename);
+ object_property_set_int(OBJECT(&s->sdhci), "num-slots", 1, &error_abort);
+
+ /* Init sd card slot class here so that they're under the correct parent */
+ object_initialize_child(obj, "sd-controller.sdhci",
+ &s->sdhci.slots[0], TYPE_SYSBUS_SDHCI);
}
/*
@@ -681,6 +692,15 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev,
Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_RTC));
+ /* SDHCI */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdhci), 0,
+ sc->memmap[ASPEED_DEV_SDHCI]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
+ aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI));
+
create_unimplemented_device("ast2700.dpmcu", 0x11000000, 0x40000);
create_unimplemented_device("ast2700.iomem0", 0x12000000, 0x01000000);
create_unimplemented_device("ast2700.iomem1", 0x14000000, 0x01000000);
--
2.34.1
- [PATCH v3 1/7] hw/sd/aspeed_sdhci: Fix coding style, (continued)
- [PATCH v3 1/7] hw/sd/aspeed_sdhci: Fix coding style, Jamin Lin, 2024/12/04
- [PATCH v3 2/7] hw/arm/aspeed: Fix coding style, Jamin Lin, 2024/12/04
- [PATCH v3 3/7] hw:sdhci: Introduce a new "capareg" class member to set the different Capability Registers, Jamin Lin, 2024/12/04
- [PATCH v3 4/7] hw:sdhci: Directly set sd_spec_version instead of property, Jamin Lin, 2024/12/04
- [PATCH v3 5/7] hw/sd/aspeed_sdhci: Add AST2700 Support, Jamin Lin, 2024/12/04
- [PATCH v3 6/7] aspeed/soc: Support SDHCI for AST2700,
Jamin Lin <=
- [PATCH v3 7/7] aspeed/soc: Support eMMC for AST2700, Jamin Lin, 2024/12/04