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[PATCH v2 28/69] target/arm: Convert FRINT[NPMSAXI] (scalar) to decodetr
From: |
Richard Henderson |
Subject: |
[PATCH v2 28/69] target/arm: Convert FRINT[NPMSAXI] (scalar) to decodetree |
Date: |
Tue, 10 Dec 2024 10:16:52 -0600 |
Remove handle_fp_1src_half as these were the last insns
decoded by that function.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate-a64.c | 117 +++++++++++----------------------
target/arm/tcg/a64.decode | 8 +++
2 files changed, 46 insertions(+), 79 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index f32cc2f0af..45321cdca7 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -8401,46 +8401,24 @@ static const FPScalar1 f_scalar_fsqrt = {
};
TRANS(FSQRT_s, do_fp1_scalar, a, &f_scalar_fsqrt, -1)
-/* Floating-point data-processing (1 source) - half precision */
-static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int rn)
-{
- TCGv_ptr fpst = NULL;
- TCGv_i32 tcg_op = read_fp_hreg(s, rn);
- TCGv_i32 tcg_res = tcg_temp_new_i32();
+static const FPScalar1 f_scalar_frint = {
+ gen_helper_advsimd_rinth,
+ gen_helper_rints,
+ gen_helper_rintd,
+};
+TRANS(FRINTN_s, do_fp1_scalar, a, &f_scalar_frint, FPROUNDING_TIEEVEN)
+TRANS(FRINTP_s, do_fp1_scalar, a, &f_scalar_frint, FPROUNDING_POSINF)
+TRANS(FRINTM_s, do_fp1_scalar, a, &f_scalar_frint, FPROUNDING_NEGINF)
+TRANS(FRINTZ_s, do_fp1_scalar, a, &f_scalar_frint, FPROUNDING_ZERO)
+TRANS(FRINTA_s, do_fp1_scalar, a, &f_scalar_frint, FPROUNDING_TIEAWAY)
+TRANS(FRINTI_s, do_fp1_scalar, a, &f_scalar_frint, -1)
- switch (opcode) {
- case 0x8: /* FRINTN */
- case 0x9: /* FRINTP */
- case 0xa: /* FRINTM */
- case 0xb: /* FRINTZ */
- case 0xc: /* FRINTA */
- {
- TCGv_i32 tcg_rmode;
-
- fpst = fpstatus_ptr(FPST_FPCR_F16);
- tcg_rmode = gen_set_rmode(opcode & 7, fpst);
- gen_helper_advsimd_rinth(tcg_res, tcg_op, fpst);
- gen_restore_rmode(tcg_rmode, fpst);
- break;
- }
- case 0xe: /* FRINTX */
- fpst = fpstatus_ptr(FPST_FPCR_F16);
- gen_helper_advsimd_rinth_exact(tcg_res, tcg_op, fpst);
- break;
- case 0xf: /* FRINTI */
- fpst = fpstatus_ptr(FPST_FPCR_F16);
- gen_helper_advsimd_rinth(tcg_res, tcg_op, fpst);
- break;
- default:
- case 0x0: /* FMOV */
- case 0x1: /* FABS */
- case 0x2: /* FNEG */
- case 0x3: /* FSQRT */
- g_assert_not_reached();
- }
-
- write_fp_sreg(s, rd, tcg_res);
-}
+static const FPScalar1 f_scalar_frintx = {
+ gen_helper_advsimd_rinth_exact,
+ gen_helper_rints_exact,
+ gen_helper_rintd_exact,
+};
+TRANS(FRINTX_s, do_fp1_scalar, a, &f_scalar_frintx, -1)
/* Floating-point data-processing (1 source) - single precision */
static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
@@ -8457,20 +8435,6 @@ static void handle_fp_1src_single(DisasContext *s, int
opcode, int rd, int rn)
case 0x6: /* BFCVT */
gen_fpst = gen_helper_bfcvt;
break;
- case 0x8: /* FRINTN */
- case 0x9: /* FRINTP */
- case 0xa: /* FRINTM */
- case 0xb: /* FRINTZ */
- case 0xc: /* FRINTA */
- rmode = opcode & 7;
- gen_fpst = gen_helper_rints;
- break;
- case 0xe: /* FRINTX */
- gen_fpst = gen_helper_rints_exact;
- break;
- case 0xf: /* FRINTI */
- gen_fpst = gen_helper_rints;
- break;
case 0x10: /* FRINT32Z */
rmode = FPROUNDING_ZERO;
gen_fpst = gen_helper_frint32_s;
@@ -8490,6 +8454,13 @@ static void handle_fp_1src_single(DisasContext *s, int
opcode, int rd, int rn)
case 0x1: /* FABS */
case 0x2: /* FNEG */
case 0x3: /* FSQRT */
+ case 0x8: /* FRINTN */
+ case 0x9: /* FRINTP */
+ case 0xa: /* FRINTM */
+ case 0xb: /* FRINTZ */
+ case 0xc: /* FRINTA */
+ case 0xe: /* FRINTX */
+ case 0xf: /* FRINTI */
g_assert_not_reached();
}
@@ -8517,20 +8488,6 @@ static void handle_fp_1src_double(DisasContext *s, int
opcode, int rd, int rn)
tcg_res = tcg_temp_new_i64();
switch (opcode) {
- case 0x8: /* FRINTN */
- case 0x9: /* FRINTP */
- case 0xa: /* FRINTM */
- case 0xb: /* FRINTZ */
- case 0xc: /* FRINTA */
- rmode = opcode & 7;
- gen_fpst = gen_helper_rintd;
- break;
- case 0xe: /* FRINTX */
- gen_fpst = gen_helper_rintd_exact;
- break;
- case 0xf: /* FRINTI */
- gen_fpst = gen_helper_rintd;
- break;
case 0x10: /* FRINT32Z */
rmode = FPROUNDING_ZERO;
gen_fpst = gen_helper_frint32_d;
@@ -8550,6 +8507,13 @@ static void handle_fp_1src_double(DisasContext *s, int
opcode, int rd, int rn)
case 0x1: /* FABS */
case 0x2: /* FNEG */
case 0x3: /* FSQRT */
+ case 0x8: /* FRINTN */
+ case 0x9: /* FRINTP */
+ case 0xa: /* FRINTM */
+ case 0xb: /* FRINTZ */
+ case 0xc: /* FRINTA */
+ case 0xe: /* FRINTX */
+ case 0xf: /* FRINTI */
g_assert_not_reached();
}
@@ -8668,9 +8632,6 @@ static void disas_fp_1src(DisasContext *s, uint32_t insn)
if (type > 1 || !dc_isar_feature(aa64_frint, s)) {
goto do_unallocated;
}
- /* fall through */
- case 0x8 ... 0xc:
- case 0xe ... 0xf:
/* 32-to-32 and 64-to-64 ops */
switch (type) {
case 0:
@@ -8686,15 +8647,6 @@ static void disas_fp_1src(DisasContext *s, uint32_t insn)
handle_fp_1src_double(s, opcode, rd, rn);
break;
case 3:
- if (!dc_isar_feature(aa64_fp16, s)) {
- goto do_unallocated;
- }
-
- if (!fp_access_check(s)) {
- return;
- }
- handle_fp_1src_half(s, opcode, rd, rn);
- break;
default:
goto do_unallocated;
}
@@ -8722,6 +8674,13 @@ static void disas_fp_1src(DisasContext *s, uint32_t insn)
case 0x1: /* FABS */
case 0x2: /* FNEG */
case 0x3: /* FSQRT */
+ case 0x8: /* FRINTN */
+ case 0x9: /* FRINTP */
+ case 0xa: /* FRINTM */
+ case 0xb: /* FRINTZ */
+ case 0xc: /* FRINTA */
+ case 0xe: /* FRINTX */
+ case 0xf: /* FRINTI */
unallocated_encoding(s);
break;
}
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 3b1e8e0776..9d2f099c9c 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -1329,6 +1329,14 @@ FABS_s 00011110 .. 1 000001 10000 ..... .....
@rr_hsd
FNEG_s 00011110 .. 1 000010 10000 ..... ..... @rr_hsd
FSQRT_s 00011110 .. 1 000011 10000 ..... ..... @rr_hsd
+FRINTN_s 00011110 .. 1 001000 10000 ..... ..... @rr_hsd
+FRINTP_s 00011110 .. 1 001001 10000 ..... ..... @rr_hsd
+FRINTM_s 00011110 .. 1 001010 10000 ..... ..... @rr_hsd
+FRINTZ_s 00011110 .. 1 001011 10000 ..... ..... @rr_hsd
+FRINTA_s 00011110 .. 1 001100 10000 ..... ..... @rr_hsd
+FRINTX_s 00011110 .. 1 001110 10000 ..... ..... @rr_hsd
+FRINTI_s 00011110 .. 1 001111 10000 ..... ..... @rr_hsd
+
# Floating-point Immediate
FMOVI_s 0001 1110 .. 1 imm:8 100 00000 rd:5 esz=%esz_hsd
--
2.43.0
- [PATCH v2 23/69] target/arm: Fix decode of fp16 vector fabs, fneg, (continued)
- [PATCH v2 23/69] target/arm: Fix decode of fp16 vector fabs, fneg, Richard Henderson, 2024/12/10
- [PATCH v2 16/69] target/arm: Convert RMIF to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 20/69] target/arm: Introduce fp_access_check_scalar_hsd, Richard Henderson, 2024/12/10
- [PATCH v2 25/69] target/arm: Pass fpstatus to vfp_sqrt*, Richard Henderson, 2024/12/10
- [PATCH v2 26/69] target/arm: Remove helper_sqrt_f16, Richard Henderson, 2024/12/10
- [PATCH v2 24/69] target/arm: Convert FMOV, FABS, FNEG (scalar) to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 27/69] target/arm: Convert FSQRT (scalar) to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 28/69] target/arm: Convert FRINT[NPMSAXI] (scalar) to decodetree,
Richard Henderson <=
- [PATCH v2 30/69] target/arm: Convert FRINT{32, 64}[ZX] (scalar) to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 29/69] target/arm: Convert BFCVT to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 31/69] target/arm: Convert FCVT (scalar) to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 32/69] target/arm: Convert handle_fpfpcvt to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 33/69] target/arm: Convert FJCVTZS to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 34/69] target/arm: Convert handle_fmov to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 35/69] target/arm: Convert SQABS, SQNEG to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 36/69] target/arm: Convert ABS, NEG to decodetree, Richard Henderson, 2024/12/10
- [PATCH v2 37/69] target/arm: Introduce gen_gvec_cls, gen_gvec_clz, Richard Henderson, 2024/12/10