On Tue, 10 Dec 2024 at 16:19, Richard Henderson
<richard.henderson@linaro.org> wrote:
These opcodes are only supported as vector operations,
not as advsimd scalar. Set only_in_vector, and remove
the unreachable implementation of scalar fneg.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate-a64.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index a99f3d0d13..f67360c4c5 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -10816,6 +10816,7 @@ static void disas_simd_two_reg_misc_fp16(DisasContext
*s, uint32_t insn)
break;
case 0x2f: /* FABS */
case 0x6f: /* FNEG */
+ only_in_vector = true;
need_fpst = false;
break;
case 0x7d: /* FRSQRTE */
Also case 0x7f FRSQRT I think, which will currently fall into
a g_assert_not_reached() for the scalar case.