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[PATCH 4/8] tests/qtest/e1000e|igb: Fix e1000e and igb tests to re-trigg
From: |
Nicholas Piggin |
Subject: |
[PATCH 4/8] tests/qtest/e1000e|igb: Fix e1000e and igb tests to re-trigger interrupts |
Date: |
Thu, 12 Dec 2024 18:34:57 +1000 |
The e1000e and igb tests don't clear the msix pending bit after waiting
for it sit is masked so the irq doesn't get delivered. Failing to clear
the pending interrupt means all subsequent waits for interrupt after the
first do not actually wait for an interrupt genreated by the device.
Explicitly clearing the msix pending bit results in the
multiple-transfers test hanging waiting for the second interrupt. This
happens because the e1000e and igb tests do not clear (or set
auto-clear) on queue interrupts, so the cause remains ste in ICR/EICR,
which inhibits triggering of a new interrupt.
Fix both these problems. Clear the msix pending bit explicitly after
waiting for it; and clear the ICR/EICR cause bits after seeing and
interrupt (also verify we saw the correct cause bit).
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Cc: Dmitry Fleytman <dmitry.fleytman@gmail.com>
Cc: Akihiko Odaki <akihiko.odaki@daynix.com>
Cc: Sriram Yagnaraman <sriram.yagnaraman@ericsson.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
tests/qtest/e1000e-test.c | 8 ++++++--
tests/qtest/igb-test.c | 8 ++++++--
tests/qtest/libqos/e1000e.c | 2 +-
3 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/tests/qtest/e1000e-test.c b/tests/qtest/e1000e-test.c
index de9738fdb74..a69759da70e 100644
--- a/tests/qtest/e1000e-test.c
+++ b/tests/qtest/e1000e-test.c
@@ -64,8 +64,10 @@ static void e1000e_send_verify(QE1000E *d, int
*test_sockets, QGuestAllocator *a
/* Put descriptor to the ring */
e1000e_tx_ring_push(d, &descr);
- /* Wait for TX WB interrupt */
+ /* Wait for TX WB interrupt (this clears the MSIX PBA) */
e1000e_wait_isr(d, E1000E_TX0_MSG_ID);
+ /* Read ICR which clears it ready for next interrupt, assert TXQ0 cause */
+ g_assert(e1000e_macreg_read(d, E1000_ICR) & E1000_ICR_TXQ0);
/* Check DD bit */
g_assert_cmphex(le32_to_cpu(descr.upper.data) & E1000_TXD_STAT_DD, ==,
@@ -115,8 +117,10 @@ static void e1000e_receive_verify(QE1000E *d, int
*test_sockets, QGuestAllocator
/* Put descriptor to the ring */
e1000e_rx_ring_push(d, &descr);
- /* Wait for TX WB interrupt */
+ /* Wait for TX WB interrupt (this clears the MSIX PBA) */
e1000e_wait_isr(d, E1000E_RX0_MSG_ID);
+ /* Read ICR which clears it ready for next interrupt, assert RXQ0 cause */
+ g_assert(e1000e_macreg_read(d, E1000_ICR) & E1000_ICR_RXQ0);
/* Check DD bit */
g_assert_cmphex(le32_to_cpu(descr.wb.upper.status_error) &
diff --git a/tests/qtest/igb-test.c b/tests/qtest/igb-test.c
index 3d397ea6973..2f22c4fb208 100644
--- a/tests/qtest/igb-test.c
+++ b/tests/qtest/igb-test.c
@@ -67,8 +67,10 @@ static void igb_send_verify(QE1000E *d, int *test_sockets,
QGuestAllocator *allo
/* Put descriptor to the ring */
e1000e_tx_ring_push(d, &descr);
- /* Wait for TX WB interrupt */
+ /* Wait for TX WB interrupt (this clears the MSIX PBA) */
e1000e_wait_isr(d, E1000E_TX0_MSG_ID);
+ /* Read EICR which clears it ready for next interrupt, assert TXQ0 cause */
+ g_assert(e1000e_macreg_read(d, E1000_EICR) & (1 << E1000E_TX0_MSG_ID));
/* Check DD bit */
g_assert_cmphex(le32_to_cpu(descr.wb.status) & E1000_TXD_STAT_DD, ==,
@@ -118,8 +120,10 @@ static void igb_receive_verify(QE1000E *d, int
*test_sockets, QGuestAllocator *a
/* Put descriptor to the ring */
e1000e_rx_ring_push(d, &descr);
- /* Wait for TX WB interrupt */
+ /* Wait for TX WB interrupt (this clears the MSIX PBA) */
e1000e_wait_isr(d, E1000E_RX0_MSG_ID);
+ /* Read EICR which clears it ready for next interrupt, assert RXQ0 cause */
+ g_assert(e1000e_macreg_read(d, E1000_EICR) & (1 << E1000E_RX0_MSG_ID));
/* Check DD bit */
g_assert_cmphex(le32_to_cpu(descr.wb.upper.status_error) &
diff --git a/tests/qtest/libqos/e1000e.c b/tests/qtest/libqos/e1000e.c
index 925654c7fd4..8ef6a04f43e 100644
--- a/tests/qtest/libqos/e1000e.c
+++ b/tests/qtest/libqos/e1000e.c
@@ -83,7 +83,7 @@ void e1000e_wait_isr(QE1000E *d, uint16_t msg_id)
guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
do {
- if (qpci_msix_pending(&d_pci->pci_dev, msg_id)) {
+ if (qpci_msix_test_clear_pending(&d_pci->pci_dev, msg_id)) {
return;
}
qtest_clock_step(d_pci->pci_dev.bus->qts, 10000);
--
2.45.2
- [PATCH 0/8] Add XHCI TR NOOP support, plus PCI, MSIX changes, Nicholas Piggin, 2024/12/12
- [PATCH 1/8] qtest/pci: Enforce balanced iomap/unmap, Nicholas Piggin, 2024/12/12
- [PATCH 2/8] qtest/libqos/pci: Fix qpci_msix_enable sharing bar0, Nicholas Piggin, 2024/12/12
- [PATCH 3/8] pci/msix: Implement PBA writes, Nicholas Piggin, 2024/12/12
- [PATCH 4/8] tests/qtest/e1000e|igb: Fix e1000e and igb tests to re-trigger interrupts,
Nicholas Piggin <=
- [PATCH 5/8] hw/usb/xhci: Move HCD constants to a header and add register constants, Nicholas Piggin, 2024/12/12
- [PATCH 7/8] hw/usb/xhci: Support TR NOOP commands, Nicholas Piggin, 2024/12/12
- [PATCH 6/8] qtest/xhci: Add controller and device setup and ring tests, Nicholas Piggin, 2024/12/12
- [PATCH 8/8] qtest/xhci: add a test for TR NOOP commands, Nicholas Piggin, 2024/12/12