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[PULL v2 11/39] hw/intc/riscv_aplic: rename is_kvm_aia()
From: |
Alistair Francis |
Subject: |
[PULL v2 11/39] hw/intc/riscv_aplic: rename is_kvm_aia() |
Date: |
Fri, 20 Dec 2024 11:54:11 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
The helper is_kvm_aia() is checking not only for AIA, but for
aplic-imsic (i.e. "aia=aplic-imsic" in 'virt' RISC-V machine) with an
in-kernel chip present.
Rename it to be a bit clear what the helper is doing since we'll add
more AIA helpers in the next patches.
Make the helper public because the 'virt' machine will use it as well.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241119191706.718860-2-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
include/hw/intc/riscv_aplic.h | 1 +
hw/intc/riscv_aplic.c | 8 ++++----
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/include/hw/intc/riscv_aplic.h b/include/hw/intc/riscv_aplic.h
index de8532fbc3..fd0e6427d9 100644
--- a/include/hw/intc/riscv_aplic.h
+++ b/include/hw/intc/riscv_aplic.h
@@ -71,6 +71,7 @@ struct RISCVAPLICState {
};
void riscv_aplic_add_child(DeviceState *parent, DeviceState *child);
+bool riscv_is_kvm_aia_aplic_imsic(bool msimode);
DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size,
uint32_t hartid_base, uint32_t num_harts, uint32_t num_sources,
diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index 3edab64b97..9f9814a40b 100644
--- a/hw/intc/riscv_aplic.c
+++ b/hw/intc/riscv_aplic.c
@@ -154,7 +154,7 @@
* KVM AIA only supports APLIC MSI, fallback to QEMU emulation if we want to
use
* APLIC Wired.
*/
-static bool is_kvm_aia(bool msimode)
+bool riscv_is_kvm_aia_aplic_imsic(bool msimode)
{
return kvm_irqchip_in_kernel() && msimode;
}
@@ -857,7 +857,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error
**errp)
uint32_t i;
RISCVAPLICState *aplic = RISCV_APLIC(dev);
- if (!is_kvm_aia(aplic->msimode)) {
+ if (!riscv_is_kvm_aia_aplic_imsic(aplic->msimode)) {
aplic->bitfield_words = (aplic->num_irqs + 31) >> 5;
aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs);
aplic->state = g_new0(uint32_t, aplic->num_irqs);
@@ -881,7 +881,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error
**errp)
* have IRQ lines delegated by their parent APLIC.
*/
if (!aplic->parent) {
- if (kvm_enabled() && is_kvm_aia(aplic->msimode)) {
+ if (kvm_enabled() && riscv_is_kvm_aia_aplic_imsic(aplic->msimode)) {
qdev_init_gpio_in(dev, riscv_kvm_aplic_request, aplic->num_irqs);
} else {
qdev_init_gpio_in(dev, riscv_aplic_request, aplic->num_irqs);
@@ -1025,7 +1025,7 @@ DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size,
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
- if (!is_kvm_aia(msimode)) {
+ if (!riscv_is_kvm_aia_aplic_imsic(msimode)) {
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr);
}
--
2.47.1
- [PULL v2 03/39] hw/riscv/riscv-iommu.c: add riscv_iommu_instance_init(), (continued)
- [PULL v2 03/39] hw/riscv/riscv-iommu.c: add riscv_iommu_instance_init(), Alistair Francis, 2024/12/19
- [PULL v2 04/39] hw/riscv/riscv-iommu: parametrize CAP.IGS, Alistair Francis, 2024/12/19
- [PULL v2 05/39] hw/riscv: add riscv-iommu-sys platform device, Alistair Francis, 2024/12/19
- [PULL v2 06/39] hw/riscv/virt: Add IOMMU as platform device if the option is set, Alistair Francis, 2024/12/19
- [PULL v2 07/39] hw/riscv/virt.c, riscv-iommu-sys.c: add MSIx support, Alistair Francis, 2024/12/19
- [PULL v2 08/39] hw/riscv/riscv-iommu: implement reset protocol, Alistair Francis, 2024/12/19
- [PULL v2 09/39] docs/specs: add riscv-iommu-sys information, Alistair Francis, 2024/12/19
- [PULL v2 10/39] target/riscv: Add Tenstorrent Ascalon CPU, Alistair Francis, 2024/12/19
- [PULL v2 13/39] hw/riscv/virt.c: rename helper to virt_use_kvm_aia_aplic_imsic(), Alistair Francis, 2024/12/19
- [PULL v2 15/39] hw/riscv/virt.c, riscv_aplic.c: add 'emulated_aplic' helpers, Alistair Francis, 2024/12/19
- [PULL v2 11/39] hw/intc/riscv_aplic: rename is_kvm_aia(),
Alistair Francis <=
- [PULL v2 12/39] hw/riscv/virt.c: reduce virt_use_kvm_aia() usage, Alistair Francis, 2024/12/19
- [PULL v2 14/39] target/riscv/kvm: consider irqchip_split() in aia_create(), Alistair Francis, 2024/12/19
- [PULL v2 17/39] target/riscv/kvm: remove irqchip_split() restriction, Alistair Francis, 2024/12/19
- [PULL v2 16/39] hw/intc/riscv_aplic: add kvm_msicfgaddr for split mode aplic-imsic, Alistair Francis, 2024/12/19
- [PULL v2 18/39] docs: update riscv/virt.rst with kernel-irqchip=split support, Alistair Francis, 2024/12/19
- [PULL v2 19/39] hw/riscv: Add Microblaze V generic board, Alistair Francis, 2024/12/19
- [PULL v2 20/39] qtest: allow SPCR acpi table changes, Alistair Francis, 2024/12/19
- [PULL v2 21/39] hw/acpi: Upgrade ACPI SPCR table to support SPCR table revision 4 format, Alistair Francis, 2024/12/19
- [PULL v2 22/39] tests/qtest/bios-tables-test: Update virt SPCR golden reference for RISC-V, Alistair Francis, 2024/12/19
- [PULL v2 24/39] hw/char/riscv_htif: Explicit little-endian implementation, Alistair Francis, 2024/12/19