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[Qemu-ppc] [PATCH 19/32] mmu-hash64: Combine ppc_hash64_get_physical_add
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PATCH 19/32] mmu-hash64: Combine ppc_hash64_get_physical_address and get_segment64() |
Date: |
Fri, 15 Feb 2013 19:01:09 +1100 |
After previous work, ppc_hash64_get_physical_address() is an almost trivial
wrapper around get_segment64() which does nearly all the work of
translating an address according to the 64-bit hash mmu model. Therefore
combine the two functions into one, under the better name of
ppc_hash64_translate().
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/mmu-hash64.c | 37 +++++++++++++++----------------------
1 file changed, 15 insertions(+), 22 deletions(-)
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 74932ba..17781a4 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -434,19 +434,28 @@ static int find_pte64(CPUPPCState *env, struct
mmu_ctx_hash64 *ctx,
return ret;
}
-static int get_segment64(CPUPPCState *env, struct mmu_ctx_hash64 *ctx,
- target_ulong eaddr, int rwx)
+static int ppc_hash64_translate(CPUPPCState *env, struct mmu_ctx_hash64 *ctx,
+ target_ulong eaddr, int rwx)
{
hwaddr hash;
target_ulong vsid;
int pr, target_page_bits;
int ret, ret2;
-
- pr = msr_pr;
ppc_slb_t *slb;
target_ulong pageaddr;
int segment_bits;
+ /* 1. Handle real mode accesses */
+ if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) {
+ /* Translation is off */
+ /* In real mode the top 4 effective address bits are ignored */
+ ctx->raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL;
+ ctx->prot = PAGE_READ | PAGE_EXEC | PAGE_WRITE;
+ return 0;
+ }
+
+ pr = msr_pr;
+
LOG_MMU("Check SLBs\n");
slb = slb_lookup(env, eaddr);
if (!slb) {
@@ -518,27 +527,11 @@ static int get_segment64(CPUPPCState *env, struct
mmu_ctx_hash64 *ctx,
return ret;
}
-static int ppc_hash64_get_physical_address(CPUPPCState *env,
- struct mmu_ctx_hash64 *ctx,
- target_ulong eaddr, int rwx)
-{
- bool real_mode = (rwx == 2 && msr_ir == 0)
- || (rwx != 2 && msr_dr == 0);
-
- if (real_mode) {
- ctx->raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL;
- ctx->prot = PAGE_READ | PAGE_EXEC | PAGE_WRITE;
- return 0;
- } else {
- return get_segment64(env, ctx, eaddr, rwx);
- }
-}
-
hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr)
{
struct mmu_ctx_hash64 ctx;
- if (unlikely(ppc_hash64_get_physical_address(env, &ctx, addr, 0) != 0)) {
+ if (unlikely(ppc_hash64_translate(env, &ctx, addr, 0) != 0)) {
return -1;
}
@@ -551,7 +544,7 @@ int ppc_hash64_handle_mmu_fault(CPUPPCState *env,
target_ulong address, int rwx,
struct mmu_ctx_hash64 ctx;
int ret = 0;
- ret = ppc_hash64_get_physical_address(env, &ctx, address, rwx);
+ ret = ppc_hash64_translate(env, &ctx, address, rwx);
if (ret == 0) {
tlb_set_page(env, address & TARGET_PAGE_MASK,
ctx.raddr & TARGET_PAGE_MASK, ctx.prot,
--
1.7.10.4
- [Qemu-ppc] [PATCH 11/32] target-ppc: Disentangle hash mmu helper functions, (continued)
- [Qemu-ppc] [PATCH 11/32] target-ppc: Disentangle hash mmu helper functions, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 17/32] mmu-hash64: Remove nx from mmu_ctx_hash64, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 18/32] mmu-hash64: Remove eaddr field from mmu_ctx_hash64, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 04/32] target-ppc: Disentangle 64-bit version of pte_check(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 02/32] target-ppc: Remove address check for logging, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 08/32] target-ppc: Disentangle 64-bit hash MMU get_physical_address() paths, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 14/32] mmu-hash64: Add header file for definitions, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 12/32] target-ppc: Don't share get_pteg_offset() between 32 and 64-bit, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 16/32] mmu-hash64: Stop using access_type, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 10/32] target-ppc: Disentangle 64-bit hash version of cpu_get_phys_page_debug(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 19/32] mmu-hash64: Combine ppc_hash64_get_physical_address and get_segment64(),
David Gibson <=
- [Qemu-ppc] [PATCH 20/32] mmu-hash64: Cleanup segment-level access checks, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 09/32] target-ppc: Disentangle ppc64 hash mmu path for cpu_ppc_handle_mmu_fault, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 07/32] target-ppc: Rework get_physical_address(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 05/32] target-ppc: Disentangle 64-bit version of find_pte(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 13/32] target-ppc: mmu_ctx_t should not be a global type, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 06/32] target-ppc: Disentangle 64-bit version of get_segment(), David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 15/32] mmu-hash64: Add hash pte load/store helpers, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 21/32] mmu-hash64: Don't keep looking for PTEs after we find a match, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 24/32] mmu-hash64: Make find_pte64 do more of the job of finding a pte, David Gibson, 2013/02/15
- [Qemu-ppc] [PATCH 27/32] mmu-hash64: Don't update PTE flags when permission is denied, David Gibson, 2013/02/15