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[Qemu-ppc] [PATCH 22/23] spapr: Limit available pagesizes to provide a c
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PATCH 22/23] spapr: Limit available pagesizes to provide a consistent guest environment |
Date: |
Fri, 22 Jun 2018 14:24:36 +1000 |
KVM HV has some limitations (deriving from the hardware) that mean not all
host-cpu supported pagesizes may be usable in the guest. At present this
means that KVM guests and TCG guests may see different available page sizes
even if they notionally have the same vcpu model. This is confusing and
also prevents migration between TCG and KVM.
This patch makes the environment consistent by always allowing the same set
of pagesizes. Since we can't remove the KVM limitations, we do this by
always applying the same limitations it has, even to TCG guests.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
---
hw/ppc/spapr_caps.c | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c
index 722b213d9a..62663ebdf5 100644
--- a/hw/ppc/spapr_caps.c
+++ b/hw/ppc/spapr_caps.c
@@ -335,6 +335,39 @@ static void cap_hpt_maxpagesize_apply(sPAPRMachineState
*spapr,
spapr_check_pagesize(spapr, qemu_getrampagesize(), errp);
}
+static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift,
+ uint32_t pshift)
+{
+ unsigned maxshift = *((unsigned *)opaque);
+
+ assert(pshift >= seg_pshift);
+
+ /* Don't allow the guest to use pages bigger than the configured
+ * maximum size */
+ if (pshift > maxshift) {
+ return false;
+ }
+
+ /* For whatever reason, KVM doesn't allow multiple pagesizes
+ * within a segment, *except* for the case of 16M pages in a 4k or
+ * 64k segment. Always exclude other cases, so that TCG and KVM
+ * guests see a consistent environment */
+ if ((pshift != seg_pshift) && (pshift != 24)) {
+ return false;
+ }
+
+ return true;
+}
+
+static void cap_hpt_maxpagesize_cpu_apply(sPAPRMachineState *spapr,
+ PowerPCCPU *cpu,
+ uint8_t val, Error **errp)
+{
+ unsigned maxshift = val;
+
+ ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift);
+}
+
sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
[SPAPR_CAP_HTM] = {
.name = "htm",
@@ -402,6 +435,7 @@ sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
.set = spapr_cap_set_pagesize,
.type = "int",
.apply = cap_hpt_maxpagesize_apply,
+ .cpu_apply = cap_hpt_maxpagesize_cpu_apply,
},
};
--
2.17.1
- [Qemu-ppc] [PATCH 01/23] ppc/pnv: introduce a new intc_create() operation to the chip model, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 06/23] ppc/pnv: consolidate the creation of the ISA bus device tree, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 03/23] spapr_cpu_core: migrate per-CPU data, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 02/23] ppc/pnv: introduce a new isa_create() operation to the chip model, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 22/23] spapr: Limit available pagesizes to provide a consistent guest environment,
David Gibson <=
- [Qemu-ppc] [PATCH 17/23] target/ppc: Add missing opcode for icbt on PPC440, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 14/23] sm501: Fix hardware cursor color conversion, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 04/23] spapr_cpu_core: migrate VPA related state, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 08/23] spapr: Compute effective capability values earlier, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 20/23] spapr: Use maximum page size capability to simplify memory backend checking, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 16/23] ppc4xx_i2c: Implement directcntl register, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 05/23] ppc/pnv: introduce Pnv8Chip and Pnv9Chip models, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 09/23] spapr: Add cpu_apply hook to capabilities, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 10/23] target/ppc: Add kvmppc_hpt_needs_host_contiguous_pages() helper, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 21/23] target/ppc: Add ppc_hash64_filter_pagesizes(), David Gibson, 2018/06/22