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[Qemu-ppc] [PATCH 04/23] spapr_cpu_core: migrate VPA related state
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PATCH 04/23] spapr_cpu_core: migrate VPA related state |
Date: |
Fri, 22 Jun 2018 14:24:18 +1000 |
From: Greg Kurz <address@hidden>
QEMU implements the "Shared Processor LPAR" (SPLPAR) option, which allows
the hypervisor to time-slice a physical processor into multiple virtual
processor. The intent is to allow more guests to run, and to optimize
processor utilization.
The guest OS can cede idle VCPUs, so that their processing capacity may
be used by other VCPUs, with the H_CEDE hcall. The guest OS can also
optimize spinlocks, by confering the time-slice of a spinning VCPU to the
spinlock holder if it's currently notrunning, with the H_CONFER hcall.
Both hcalls depend on a "Virtual Processor Area" (VPA) to be registered
by the guest OS, generally during early boot. Other per-VCPU areas can
be registered: the "SLB Shadow Buffer" which allows a more efficient
dispatching of VCPUs, and the "Dispatch Trace Log Buffer" (DTL) which
is used to compute time stolen by the hypervisor. Both DTL and SLB Shadow
areas depend on the VPA to be registered.
The VPA/SLB Shadow/DTL are state that QEMU should migrate, but this doesn't
happen, for no apparent reason other than it was just never coded. This
causes the features listed above to stop working after migration, and it
breaks the logic of the H_REGISTER_VPA hcall in the destination.
The VPA is set at the guest request, ie, we don't have to migrate
it before the guest has actually set it. This patch hence adds an
"spapr_cpu/vpa" subsection to the recently introduced per-CPU machine
data migration stream.
Since DTL and SLB Shadow are optional and both depend on VPA, they get
their own subsections "spapr_cpu/vpa/slb_shadow" and "spapr_cpu/vpa/dtl"
hanging from the "spapr_cpu/vpa" subsection.
Note that this won't break migration to older QEMUs. Is is already handled
by only registering the vmstate handler for per-CPU data with newer machine
types.
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_cpu_core.c | 65 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index f129ac884e..67f1596c57 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -129,6 +129,67 @@ static void spapr_cpu_core_unrealize(DeviceState *dev,
Error **errp)
g_free(sc->threads);
}
+static bool slb_shadow_needed(void *opaque)
+{
+ sPAPRCPUState *spapr_cpu = opaque;
+
+ return spapr_cpu->slb_shadow_addr != 0;
+}
+
+static const VMStateDescription vmstate_spapr_cpu_slb_shadow = {
+ .name = "spapr_cpu/vpa/slb_shadow",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = slb_shadow_needed,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT64(slb_shadow_addr, sPAPRCPUState),
+ VMSTATE_UINT64(slb_shadow_size, sPAPRCPUState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static bool dtl_needed(void *opaque)
+{
+ sPAPRCPUState *spapr_cpu = opaque;
+
+ return spapr_cpu->dtl_addr != 0;
+}
+
+static const VMStateDescription vmstate_spapr_cpu_dtl = {
+ .name = "spapr_cpu/vpa/dtl",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = dtl_needed,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT64(dtl_addr, sPAPRCPUState),
+ VMSTATE_UINT64(dtl_size, sPAPRCPUState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static bool vpa_needed(void *opaque)
+{
+ sPAPRCPUState *spapr_cpu = opaque;
+
+ return spapr_cpu->vpa_addr != 0;
+}
+
+static const VMStateDescription vmstate_spapr_cpu_vpa = {
+ .name = "spapr_cpu/vpa",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = vpa_needed,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT64(vpa_addr, sPAPRCPUState),
+ VMSTATE_END_OF_LIST()
+ },
+ .subsections = (const VMStateDescription * []) {
+ &vmstate_spapr_cpu_slb_shadow,
+ &vmstate_spapr_cpu_dtl,
+ NULL
+ }
+};
+
static const VMStateDescription vmstate_spapr_cpu_state = {
.name = "spapr_cpu",
.version_id = 1,
@@ -136,6 +197,10 @@ static const VMStateDescription vmstate_spapr_cpu_state = {
.fields = (VMStateField[]) {
VMSTATE_END_OF_LIST()
},
+ .subsections = (const VMStateDescription * []) {
+ &vmstate_spapr_cpu_vpa,
+ NULL
+ }
};
static void spapr_realize_vcpu(PowerPCCPU *cpu, sPAPRMachineState *spapr,
--
2.17.1
- [Qemu-ppc] [PATCH 01/23] ppc/pnv: introduce a new intc_create() operation to the chip model, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 06/23] ppc/pnv: consolidate the creation of the ISA bus device tree, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 03/23] spapr_cpu_core: migrate per-CPU data, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 02/23] ppc/pnv: introduce a new isa_create() operation to the chip model, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 22/23] spapr: Limit available pagesizes to provide a consistent guest environment, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 17/23] target/ppc: Add missing opcode for icbt on PPC440, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 14/23] sm501: Fix hardware cursor color conversion, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 04/23] spapr_cpu_core: migrate VPA related state,
David Gibson <=
- [Qemu-ppc] [PATCH 08/23] spapr: Compute effective capability values earlier, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 20/23] spapr: Use maximum page size capability to simplify memory backend checking, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 16/23] ppc4xx_i2c: Implement directcntl register, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 05/23] ppc/pnv: introduce Pnv8Chip and Pnv9Chip models, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 09/23] spapr: Add cpu_apply hook to capabilities, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 10/23] target/ppc: Add kvmppc_hpt_needs_host_contiguous_pages() helper, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 21/23] target/ppc: Add ppc_hash64_filter_pagesizes(), David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 12/23] spapr: remove unused spapr_irq routines, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 07/23] target/ppc: Allow cpu compatiblity checks based on type, not instance, David Gibson, 2018/06/22
- [Qemu-ppc] [PATCH 19/23] spapr: Maximum (HPT) pagesize property, David Gibson, 2018/06/22