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Re: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector instructions
From: |
David Gibson |
Subject: |
Re: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector instructions |
Date: |
Mon, 15 Jun 2020 18:49:36 +1000 |
On Fri, Jun 12, 2020 at 09:47:58PM -0700, no-reply@patchew.org wrote:
> Patchew URL:
> 20200613042029.22321-1-ljp@linux.ibm.com/">https://patchew.org/QEMU/20200613042029.22321-1-ljp@linux.ibm.com/
I will need you to fix these stype errors and repost.
>
>
>
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Message-id: 20200613042029.22321-1-ljp@linux.ibm.com
> Subject: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector instructions
> Type: series
>
> === TEST SCRIPT BEGIN ===
> #!/bin/bash
> git rev-parse base > /dev/null || exit 0
> git config --local diff.renamelimit 0
> git config --local diff.renames True
> git config --local diff.algorithm histogram
> ./scripts/checkpatch.pl --mailback base..
> === TEST SCRIPT END ===
>
> Switched to a new branch 'test'
> d39f30e target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions
> 966b641 fix the prototype of muls64/mulu64
> 42111c5 target/ppc: add vmulh{su}d instructions
> c96e996 targetc/ppc: add vmulh{su}w instructions
> c52004c target/ppc: add vmulld instruction
> 1061e4e target/ppc: add byte-reverse br[dwh] instructions
>
> === OUTPUT BEGIN ===
> 1/6 Checking commit 1061e4ead5bc (target/ppc: add byte-reverse br[dwh]
> instructions)
> ERROR: code indent should never use tabs
> #26: FILE: target/ppc/translate.c:6977:
> +^ITCGv_i64 temp = tcg_temp_new_i64();$
>
> ERROR: code indent should never use tabs
> #28: FILE: target/ppc/translate.c:6979:
> +^Itcg_gen_bswap64_i64(temp, cpu_gpr[rS(ctx->opcode)]);$
>
> WARNING: line over 80 characters
> #29: FILE: target/ppc/translate.c:6980:
> + tcg_gen_st_i64(temp, cpu_env, offsetof(CPUPPCState,
> gpr[rA(ctx->opcode)]));
>
> ERROR: code indent should never use tabs
> #29: FILE: target/ppc/translate.c:6980:
> +^Itcg_gen_st_i64(temp, cpu_env, offsetof(CPUPPCState,
> gpr[rA(ctx->opcode)]));$
>
> ERROR: code indent should never use tabs
> #31: FILE: target/ppc/translate.c:6982:
> +^Itcg_temp_free_i64(temp);$
>
> ERROR: code indent should never use tabs
> #37: FILE: target/ppc/translate.c:6988:
> +^ITCGv_i64 temp = tcg_temp_new_i64();$
>
> ERROR: code indent should never use tabs
> #38: FILE: target/ppc/translate.c:6989:
> +^ITCGv_i64 lsb = tcg_temp_new_i64();$
>
> ERROR: code indent should never use tabs
> #39: FILE: target/ppc/translate.c:6990:
> +^ITCGv_i64 msb = tcg_temp_new_i64();$
>
> ERROR: code indent should never use tabs
> #41: FILE: target/ppc/translate.c:6992:
> +^Itcg_gen_movi_i64(lsb, 0x00000000ffffffffull);$
>
> ERROR: code indent should never use tabs
> #42: FILE: target/ppc/translate.c:6993:
> +^Itcg_gen_and_i64(temp, lsb, cpu_gpr[rS(ctx->opcode)]);$
>
> ERROR: code indent should never use tabs
> #43: FILE: target/ppc/translate.c:6994:
> +^Itcg_gen_bswap32_i64(lsb, temp);$
>
> ERROR: trailing whitespace
> #44: FILE: target/ppc/translate.c:6995:
> +^I$
>
> ERROR: code indent should never use tabs
> #44: FILE: target/ppc/translate.c:6995:
> +^I$
>
> ERROR: code indent should never use tabs
> #45: FILE: target/ppc/translate.c:6996:
> +^Itcg_gen_shri_i64(msb, cpu_gpr[rS(ctx->opcode)], 32);$
>
> ERROR: code indent should never use tabs
> #46: FILE: target/ppc/translate.c:6997:
> +^Itcg_gen_bswap32_i64(temp, msb);$
>
> ERROR: code indent should never use tabs
> #47: FILE: target/ppc/translate.c:6998:
> +^Itcg_gen_shli_i64(msb, temp, 32);$
>
> ERROR: trailing whitespace
> #48: FILE: target/ppc/translate.c:6999:
> +^I$
>
> ERROR: code indent should never use tabs
> #48: FILE: target/ppc/translate.c:6999:
> +^I$
>
> ERROR: code indent should never use tabs
> #49: FILE: target/ppc/translate.c:7000:
> +^Itcg_gen_or_i64(temp, lsb, msb);$
>
> WARNING: line over 80 characters
> #51: FILE: target/ppc/translate.c:7002:
> + tcg_gen_st_i64(temp, cpu_env, offsetof(CPUPPCState,
> gpr[rA(ctx->opcode)]));
>
> ERROR: code indent should never use tabs
> #51: FILE: target/ppc/translate.c:7002:
> +^Itcg_gen_st_i64(temp, cpu_env, offsetof(CPUPPCState,
> gpr[rA(ctx->opcode)]));$
>
> ERROR: code indent should never use tabs
> #53: FILE: target/ppc/translate.c:7004:
> +^Itcg_temp_free_i64(temp);$
>
> ERROR: code indent should never use tabs
> #54: FILE: target/ppc/translate.c:7005:
> +^Itcg_temp_free_i64(lsb);$
>
> ERROR: code indent should never use tabs
> #55: FILE: target/ppc/translate.c:7006:
> +^Itcg_temp_free_i64(msb);$
>
> ERROR: code indent should never use tabs
> #61: FILE: target/ppc/translate.c:7012:
> +^ITCGv_i64 temp = tcg_temp_new_i64();$
>
> ERROR: code indent should never use tabs
> #62: FILE: target/ppc/translate.c:7013:
> +^ITCGv_i64 t0 = tcg_temp_new_i64();$
>
> ERROR: code indent should never use tabs
> #63: FILE: target/ppc/translate.c:7014:
> +^ITCGv_i64 t1 = tcg_temp_new_i64();$
>
> ERROR: code indent should never use tabs
> #64: FILE: target/ppc/translate.c:7015:
> +^ITCGv_i64 t2 = tcg_temp_new_i64();$
>
> ERROR: code indent should never use tabs
> #65: FILE: target/ppc/translate.c:7016:
> +^ITCGv_i64 t3 = tcg_temp_new_i64();$
>
> ERROR: code indent should never use tabs
> #67: FILE: target/ppc/translate.c:7018:
> +^Itcg_gen_movi_i64(t0, 0x00ff00ff00ff00ffull);$
>
> ERROR: code indent should never use tabs
> #68: FILE: target/ppc/translate.c:7019:
> +^Itcg_gen_shri_i64(t1, cpu_gpr[rS(ctx->opcode)], 8);$
>
> ERROR: code indent should never use tabs
> #69: FILE: target/ppc/translate.c:7020:
> +^Itcg_gen_and_i64(t2, t1, t0);$
>
> ERROR: code indent should never use tabs
> #70: FILE: target/ppc/translate.c:7021:
> +^Itcg_gen_and_i64(t1, cpu_gpr[rS(ctx->opcode)], t0);$
>
> ERROR: code indent should never use tabs
> #71: FILE: target/ppc/translate.c:7022:
> +^Itcg_gen_shli_i64(t1, t1, 8);$
>
> ERROR: code indent should never use tabs
> #72: FILE: target/ppc/translate.c:7023:
> +^Itcg_gen_or_i64(temp, t1, t2);$
>
> WARNING: line over 80 characters
> #73: FILE: target/ppc/translate.c:7024:
> + tcg_gen_st_i64(temp, cpu_env, offsetof(CPUPPCState,
> gpr[rA(ctx->opcode)]));
>
> ERROR: code indent should never use tabs
> #73: FILE: target/ppc/translate.c:7024:
> +^Itcg_gen_st_i64(temp, cpu_env, offsetof(CPUPPCState,
> gpr[rA(ctx->opcode)]));$
>
> ERROR: code indent should never use tabs
> #75: FILE: target/ppc/translate.c:7026:
> +^Itcg_temp_free_i64(temp);$
>
> ERROR: code indent should never use tabs
> #76: FILE: target/ppc/translate.c:7027:
> +^Itcg_temp_free_i64(t0);$
>
> ERROR: code indent should never use tabs
> #77: FILE: target/ppc/translate.c:7028:
> +^Itcg_temp_free_i64(t1);$
>
> ERROR: code indent should never use tabs
> #78: FILE: target/ppc/translate.c:7029:
> +^Itcg_temp_free_i64(t2);$
>
> ERROR: code indent should never use tabs
> #79: FILE: target/ppc/translate.c:7030:
> +^Itcg_temp_free_i64(t3);$
>
> total: 39 errors, 3 warnings, 69 lines checked
>
> Patch 1/6 has style problems, please review. If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.
>
> 2/6 Checking commit c52004cd8f89 (target/ppc: add vmulld instruction)
> 3/6 Checking commit c96e996917c6 (targetc/ppc: add vmulh{su}w instructions)
> ERROR: code indent should never use tabs
> #34: FILE: target/ppc/int_helper.c:526:
> +#define VMULH_DO(name, op, element, cast_orig, cast_temp)^I^I\$
>
> ERROR: code indent should never use tabs
> #35: FILE: target/ppc/int_helper.c:527:
> + void helper_vmulh##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)^I\$
>
> ERROR: code indent should never use tabs
> #36: FILE: target/ppc/int_helper.c:528:
> + {^I^I^I^I^I^I^I^I^I\$
>
> ERROR: code indent should never use tabs
> #37: FILE: target/ppc/int_helper.c:529:
> +^Iint i;^I^I^I^I^I^I^I^I\$
>
> ERROR: code indent should never use tabs
> #38: FILE: target/ppc/int_helper.c:530:
> +^I^I^I^I^I^I^I^I^I\$
>
> ERROR: code indent should never use tabs
> #39: FILE: target/ppc/int_helper.c:531:
> +^Ifor (i = 0; i < ARRAY_SIZE(r->element); i++) {^I^I^I\$
>
> ERROR: code indent should never use tabs
> #40: FILE: target/ppc/int_helper.c:532:
> +^I^Ir->element[i] = (cast_orig)(((cast_temp)a->element[i] op \$
>
> ERROR: code indent should never use tabs
> #41: FILE: target/ppc/int_helper.c:533:
> +^I^I^I^I(cast_temp)b->element[i]) >> 32);^I\$
>
> ERROR: code indent should never use tabs
> #42: FILE: target/ppc/int_helper.c:534:
> +^I}^I^I^I^I^I^I^I^I\$
>
> ERROR: code indent should never use tabs
> #61: FILE: target/ppc/translate/vmx-impl.inc.c:816:
> +^I^Ivmulhuw, PPC_NONE, PPC2_ISA300);$
>
> ERROR: code indent should never use tabs
> #67: FILE: target/ppc/translate/vmx-impl.inc.c:822:
> +^I^Ivmulhsw, PPC_NONE, PPC2_ISA300);$
>
> total: 11 errors, 0 warnings, 55 lines checked
>
> Patch 3/6 has style problems, please review. If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.
>
> 4/6 Checking commit 42111c50379b (target/ppc: add vmulh{su}d instructions)
> ERROR: code indent should never use tabs
> #36: FILE: target/ppc/int_helper.c:528:
> +^Iint i;$
>
> ERROR: code indent should never use tabs
> #37: FILE: target/ppc/int_helper.c:529:
> +^Iuint64_t h64 = 0;$
>
> ERROR: code indent should never use tabs
> #38: FILE: target/ppc/int_helper.c:530:
> +^Iuint64_t l64 = 0;$
>
> ERROR: code indent should never use tabs
> #40: FILE: target/ppc/int_helper.c:532:
> +^Ifor (i = 0; i < 2; i++) {$
>
> ERROR: code indent should never use tabs
> #41: FILE: target/ppc/int_helper.c:533:
> +^I^Imuls64(&l64, &h64, a->s64[i], b->s64[i]);$
>
> ERROR: code indent should never use tabs
> #42: FILE: target/ppc/int_helper.c:534:
> +^I^Ir->s64[i] = h64;$
>
> ERROR: code indent should never use tabs
> #43: FILE: target/ppc/int_helper.c:535:
> +^I}$
>
> ERROR: code indent should never use tabs
> #48: FILE: target/ppc/int_helper.c:540:
> +^Iint i;$
>
> ERROR: code indent should never use tabs
> #49: FILE: target/ppc/int_helper.c:541:
> +^Iuint64_t h64 = 0;$
>
> ERROR: code indent should never use tabs
> #50: FILE: target/ppc/int_helper.c:542:
> +^Iuint64_t l64 = 0;$
>
> ERROR: code indent should never use tabs
> #52: FILE: target/ppc/int_helper.c:544:
> +^Ifor (i = 0; i < 2; i++) {$
>
> ERROR: code indent should never use tabs
> #53: FILE: target/ppc/int_helper.c:545:
> +^I^Imulu64(&l64, &h64, a->s64[i], b->s64[i]);$
>
> ERROR: code indent should never use tabs
> #54: FILE: target/ppc/int_helper.c:546:
> +^I^Ir->u64[i] = h64;$
>
> ERROR: code indent should never use tabs
> #55: FILE: target/ppc/int_helper.c:547:
> +^I}$
>
> total: 14 errors, 0 warnings, 63 lines checked
>
> Patch 4/6 has style problems, please review. If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.
>
> 5/6 Checking commit 966b641eba85 (fix the prototype of muls64/mulu64)
> 6/6 Checking commit d39f30e2a46f (target/ppc: add vdiv{su}{wd} vmod{su}{wd}
> instructions)
> ERROR: code indent should never use tabs
> #104: FILE: target/ppc/translate/vmx-impl.inc.c:832:
> +^I^Ivdivsw, PPC_NONE, PPC2_ISA300, 0x00000000);$
>
> ERROR: code indent should never use tabs
> #107: FILE: target/ppc/translate/vmx-impl.inc.c:835:
> +^I^Ivdivsd, PPC_NONE, PPC2_ISA300, 0x00000000);$
>
> WARNING: line over 80 characters
> #123: FILE: target/ppc/translate/vmx-ops.inc.c:54:
> +#define GEN_VXFORM_DUAL_BOTH(name0, name1, opc2, opc3, inval0, inval1,
> type0, type1) \
>
> ERROR: code indent should never use tabs
> #136: FILE: target/ppc/translate/vmx-ops.inc.c:122:
> +^I^I^IPPC_ALTIVEC, PPC2_ISA300),$
>
> ERROR: code indent should never use tabs
> #138: FILE: target/ppc/translate/vmx-ops.inc.c:124:
> +^I^I^IPPC_ALTIVEC, PPC2_ISA300),$
>
> total: 4 errors, 1 warnings, 108 lines checked
>
> Patch 6/6 has style problems, please review. If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.
>
> === OUTPUT END ===
>
> Test command exited with code: 1
>
>
> The full log is available at
> 20200613042029.22321-1-ljp@linux.ibm.com/testing.checkpatch/?type=message">http://patchew.org/logs/20200613042029.22321-1-ljp@linux.ibm.com/testing.checkpatch/?type=message.
> ---
> Email generated automatically by Patchew [https://patchew.org/].
> Please send your feedback to patchew-devel@redhat.com
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [PATCH 1/6] target/ppc: add byte-reverse br[dwh] instructions, (continued)
[PATCH 5/6] fix the prototype of muls64/mulu64, Lijun Pan, 2020/06/13
[PATCH 4/6] target/ppc: add vmulh{su}d instructions, Lijun Pan, 2020/06/13
[PATCH 6/6] target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions, Lijun Pan, 2020/06/13
Re: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector instructions, no-reply, 2020/06/13
- Re: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector instructions,
David Gibson <=
Re: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector instructions, Cédric Le Goater, 2020/06/15
Re: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector instructions, Richard Henderson, 2020/06/18