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Re: [PATCH 1/6] target/ppc: add byte-reverse br[dwh] instructions
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH 1/6] target/ppc: add byte-reverse br[dwh] instructions |
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Date: |
Fri, 19 Jun 2020 14:08:21 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 |
On 6/18/20 10:24 PM, Lijun Pan wrote:
> Why can’t I retrieve the offset via
> “offsetof(CPUPPCState,gpr[rA(ctx->opcode)])”?
> I would like to learn more.
The TCG compiler makes some simplifying assumptions in order to make it faster.
One of them is that global temporaries cannot be modified via direct loads and
stores, so we do not have to check for that overlap during compilation.
I thought that was documented in tcg/README, but I can't find it.
r~
- Re: [PATCH 2/6] target/ppc: add vmulld instruction, (continued)
[PATCH 3/6] targetc/ppc: add vmulh{su}w instructions, Lijun Pan, 2020/06/13
[PATCH 1/6] target/ppc: add byte-reverse br[dwh] instructions, Lijun Pan, 2020/06/13
[PATCH 5/6] fix the prototype of muls64/mulu64, Lijun Pan, 2020/06/13
[PATCH 4/6] target/ppc: add vmulh{su}d instructions, Lijun Pan, 2020/06/13
[PATCH 6/6] target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions, Lijun Pan, 2020/06/13
Re: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector instructions, no-reply, 2020/06/13
Re: [PATCH 0/6] Add several Power ISA 3.1 32/64-bit vector instructions, Cédric Le Goater, 2020/06/15