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[PULL 29/30] target/ppc: Add unused msr bits FIELDs
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 29/30] target/ppc: Add unused msr bits FIELDs |
Date: |
Thu, 5 May 2022 15:49:37 -0300 |
From: Víctor Colombo <victor.colombo@eldorado.org.br>
Add FIELDs macros for msr bits that had an unused msr_* before.
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-22-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
target/ppc/cpu.h | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index af249239d5..4577cfcc23 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -354,16 +354,31 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt 1 */
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+FIELD(MSR, SF, MSR_SF, 1)
+FIELD(MSR, TAG, MSR_TAG, 1)
+FIELD(MSR, ISF, MSR_ISF, 1)
#if defined(TARGET_PPC64)
FIELD(MSR, HV, MSR_HV, 1)
#define FIELD_EX64_HV(storage) FIELD_EX64(storage, MSR, HV)
#else
#define FIELD_EX64_HV(storage) 0
#endif
+FIELD(MSR, TS0, MSR_TS0, 1)
+FIELD(MSR, TS1, MSR_TS1, 1)
FIELD(MSR, TS, MSR_TS0, 2)
+FIELD(MSR, TM, MSR_TM, 1)
FIELD(MSR, CM, MSR_CM, 1)
+FIELD(MSR, ICM, MSR_ICM, 1)
FIELD(MSR, GS, MSR_GS, 1)
+FIELD(MSR, UCLE, MSR_UCLE, 1)
+FIELD(MSR, VR, MSR_VR, 1)
+FIELD(MSR, SPE, MSR_SPE, 1)
+FIELD(MSR, VSX, MSR_VSX, 1)
+FIELD(MSR, S, MSR_S, 1)
+FIELD(MSR, KEY, MSR_KEY, 1)
FIELD(MSR, POW, MSR_POW, 1)
+FIELD(MSR, WE, MSR_WE, 1)
+FIELD(MSR, TGPR, MSR_TGPR, 1)
FIELD(MSR, CE, MSR_CE, 1)
FIELD(MSR, ILE, MSR_ILE, 1)
FIELD(MSR, EE, MSR_EE, 1)
@@ -371,12 +386,22 @@ FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, FP, MSR_FP, 1)
FIELD(MSR, ME, MSR_ME, 1)
FIELD(MSR, FE0, MSR_FE0, 1)
+FIELD(MSR, SE, MSR_SE, 1)
+FIELD(MSR, DWE, MSR_DWE, 1)
+FIELD(MSR, UBLE, MSR_UBLE, 1)
+FIELD(MSR, BE, MSR_BE, 1)
FIELD(MSR, DE, MSR_DE, 1)
FIELD(MSR, FE1, MSR_FE1, 1)
+FIELD(MSR, AL, MSR_AL, 1)
FIELD(MSR, EP, MSR_EP, 1)
FIELD(MSR, IR, MSR_IR, 1)
FIELD(MSR, DR, MSR_DR, 1)
+FIELD(MSR, IS, MSR_IS, 1)
FIELD(MSR, DS, MSR_DS, 1)
+FIELD(MSR, PE, MSR_PE, 1)
+FIELD(MSR, PX, MSR_PX, 1)
+FIELD(MSR, PMM, MSR_PMM, 1)
+FIELD(MSR, RI, MSR_RI, 1)
FIELD(MSR, LE, MSR_LE, 1)
/*
--
2.32.0
- [PULL 11/30] target/ppc: Remove msr_pr macro, (continued)
- [PULL 11/30] target/ppc: Remove msr_pr macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 12/30] target/ppc: Remove msr_le macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 13/30] target/ppc: Remove msr_ds macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 17/30] target/ppc: Remove msr_pow macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 19/30] target/ppc: Remove msr_gs macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 21/30] target/ppc: Remove msr_cm macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 22/30] target/ppc: Remove msr_ir macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 24/30] target/ppc: Remove msr_ep macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 25/30] target/ppc: Remove msr_fe0 and msr_fe1 macros, Daniel Henrique Barboza, 2022/05/05
- [PULL 28/30] target/ppc: Remove msr_de macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 29/30] target/ppc: Add unused msr bits FIELDs,
Daniel Henrique Barboza <=
- [PULL 30/30] target/ppc: Change MSR_* to follow POWER ISA numbering convention, Daniel Henrique Barboza, 2022/05/05
- [PULL 23/30] target/ppc: Remove msr_dr macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 26/30] target/ppc: Remove msr_ts macro, Daniel Henrique Barboza, 2022/05/05
- [PULL 27/30] target/ppc: Remove msr_hv macro, Daniel Henrique Barboza, 2022/05/05
- Re: [PULL 00/30] ppc queue, Richard Henderson, 2022/05/06