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[PATCH 02/20] hw/core/cpu: Introduce CPUClass::datapath_is_big_endian()
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 02/20] hw/core/cpu: Introduce CPUClass::datapath_is_big_endian() handler |
Date: |
Wed, 4 Dec 2024 21:25:44 +0100 |
Introduce the CPUClass::datapath_is_big_endian() handler,
which returns whether a vCPU expects data in memory to be
in big endian order or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/core/cpu.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index c3ca0babcb3..91c6581f814 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -105,6 +105,8 @@ struct SysemuCPUOps;
* @parse_features: Callback to parse command line arguments.
* @reset_dump_flags: #CPUDumpFlags to use for reset logging.
* @has_work: Callback for checking if there is work to do.
+ * @datapath_is_big_endian: Callback returning whether the vCPU expects
+ * memory data in big endian order.
* @mmu_index: Callback for choosing softmmu mmu index;
* may be used internally by memory_rw_debug without TCG.
* @memory_rw_debug: Callback for GDB memory access.
@@ -151,6 +153,7 @@ struct CPUClass {
ObjectClass *(*class_by_name)(const char *cpu_model);
void (*parse_features)(const char *typename, char *str, Error **errp);
+ bool (*datapath_is_big_endian)(CPUState *cpu);
bool (*has_work)(CPUState *cpu);
int (*mmu_index)(CPUState *cpu, bool ifetch);
int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
@@ -750,7 +753,7 @@ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
*/
bool cpu_virtio_is_big_endian(CPUState *cpu);
-#endif /* CONFIG_USER_ONLY */
+#endif /* !CONFIG_USER_ONLY */
/**
* cpu_list_add:
--
2.45.2
- [PATCH 00/20] target: Implement CPUClass::datapath_is_big_endian() handlers, Philippe Mathieu-Daudé, 2024/12/04
- [PATCH 01/20] exec/tswap: Rename target_words_bigendian -> qemu_binary_is_bigendian, Philippe Mathieu-Daudé, 2024/12/04
- [PATCH 02/20] hw/core/cpu: Introduce CPUClass::datapath_is_big_endian() handler,
Philippe Mathieu-Daudé <=
- [PATCH 03/20] target/arm: Implement CPUClass::datapath_is_big_endian, Philippe Mathieu-Daudé, 2024/12/04
- [PATCH 04/20] target/ppc: Register CPUClass::datapath_is_big_endian, Philippe Mathieu-Daudé, 2024/12/04
- [PATCH 05/20] target/rx: Implement CPUClass::datapath_is_big_endian, Philippe Mathieu-Daudé, 2024/12/04
- [PATCH 06/20] target/sparc: Implement CPUClass::datapath_is_big_endian, Philippe Mathieu-Daudé, 2024/12/04
- [PATCH 07/20] target/riscv: Implement CPUClass::datapath_is_big_endian, Philippe Mathieu-Daudé, 2024/12/04
- [PATCH 08/20] target/sh4: Expose CPUSH4State::little_endian property, Philippe Mathieu-Daudé, 2024/12/04
- [PATCH 10/20] target/microblaze: Implement CPUClass::datapath_is_big_endian, Philippe Mathieu-Daudé, 2024/12/04
- [PATCH 09/20] target/sh4: Implement CPUClass::datapath_is_big_endian, Philippe Mathieu-Daudé, 2024/12/04
- [PATCH 11/20] target/mips: Implement CPUClass::datapath_is_big_endian, Philippe Mathieu-Daudé, 2024/12/04