[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-riscv] [RFC v1 23/23] configure: Add support for building RISC-V h
From: |
Alistair Francis |
Subject: |
[Qemu-riscv] [RFC v1 23/23] configure: Add support for building RISC-V host |
Date: |
Thu, 15 Nov 2018 22:37:22 +0000 |
Signed-off-by: Alistair Francis <address@hidden>
Signed-off-by: Michael Clark <address@hidden>
---
configure | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/configure b/configure
index 74e313a810..8a7b9fc933 100755
--- a/configure
+++ b/configure
@@ -700,6 +700,12 @@ elif check_define __s390__ ; then
else
cpu="s390"
fi
+elif check_define __riscv ; then
+ if check_define _LP64 ; then
+ cpu="riscv64"
+ elif check_define _ILP32 ; then
+ cpu="riscv32"
+ fi
elif check_define __arm__ ; then
cpu="arm"
elif check_define __aarch64__ ; then
@@ -712,7 +718,7 @@ ARCH=
# Normalise host CPU name and set ARCH.
# Note that this case should only have supported host CPUs, not guests.
case "$cpu" in
- ppc|ppc64|s390|s390x|sparc64|x32)
+ ppc|ppc64|s390|s390x|sparc64|x32|riscv32|riscv64)
cpu="$cpu"
supported_cpu="yes"
eval "cross_cc_${cpu}=\$host_cc"
@@ -6809,6 +6815,8 @@ elif test "$ARCH" = "x86_64" -o "$ARCH" = "x32" ; then
QEMU_INCLUDES="-iquote \$(SRC_PATH)/tcg/i386 $QEMU_INCLUDES"
elif test "$ARCH" = "ppc64" ; then
QEMU_INCLUDES="-iquote \$(SRC_PATH)/tcg/ppc $QEMU_INCLUDES"
+elif test "$ARCH" = "riscv32" -o "$ARCH" = "riscv64" ; then
+ QEMU_INCLUDES="-I\$(SRC_PATH)/tcg/riscv $QEMU_INCLUDES"
else
QEMU_INCLUDES="-iquote \$(SRC_PATH)/tcg/\$(ARCH) $QEMU_INCLUDES"
fi
@@ -7306,7 +7314,7 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
ppc*)
disas_config "PPC"
;;
- riscv)
+ riscv*)
disas_config "RISCV"
;;
s390*)
--
2.19.1
- [Qemu-riscv] [RFC v1 20/23] riscv: tcg-target: Add the target init code, (continued)
[Qemu-riscv] [RFC v1 21/23] tcg: Add RISC-V cpu signal handler, Alistair Francis, 2018/11/15
[Qemu-riscv] [RFC v1 22/23] dias: Add RISC-V support, Alistair Francis, 2018/11/15
[Qemu-riscv] [RFC v1 23/23] configure: Add support for building RISC-V host,
Alistair Francis <=
Re: [Qemu-riscv] [Qemu-devel] [RFC v1 00/23] Add RISC-V TCG backend support, no-reply, 2018/11/16