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qemu-riscv (thread)
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Last Modified: Mon Aug 31 2020 21:41:29 -0400
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[PATCH v3 00/16] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Bin Meng
,
2020/08/31
[PATCH v3 01/16] target/riscv: cpu: Add a new 'resetvec' property
,
Bin Meng
,
2020/08/31
[PATCH v3 02/16] hw/riscv: hart: Add a new 'resetvec' property
,
Bin Meng
,
2020/08/31
[PATCH v3 03/16] target/riscv: cpu: Set reset vector based on the configured property value
,
Bin Meng
,
2020/08/31
[PATCH v3 04/16] hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board
,
Bin Meng
,
2020/08/31
[PATCH v3 05/16] hw/char: Add Microchip PolarFire SoC MMUART emulation
,
Bin Meng
,
2020/08/31
[PATCH v3 06/16] hw/riscv: microchip_pfsoc: Connect 5 MMUARTs
,
Bin Meng
,
2020/08/31
[PATCH v3 07/16] hw/sd: Add Cadence SDHCI emulation
,
Bin Meng
,
2020/08/31
[PATCH v3 08/16] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card
,
Bin Meng
,
2020/08/31
[PATCH v3 09/16] hw/dma: Add SiFive platform DMA controller emulation
,
Bin Meng
,
2020/08/31
[PATCH v3 10/16] hw/riscv: microchip_pfsoc: Connect a DMA controller
,
Bin Meng
,
2020/08/31
[PATCH v3 11/16] hw/net: cadence_gem: Add a new 'phy-addr' property
,
Bin Meng
,
2020/08/31
[PATCH v3 12/16] hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
,
Bin Meng
,
2020/08/31
[PATCH v3 13/16] hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
,
Bin Meng
,
2020/08/31
[PATCH v3 14/16] hw/riscv: microchip_pfsoc: Hook GPIO controllers
,
Bin Meng
,
2020/08/31
[PATCH v3 15/16] hw/riscv: clint: Avoid using hard-coded timebase frequency
,
Bin Meng
,
2020/08/31
[PATCH v3 16/16] hw/riscv: sifive_u: Connect a DMA controller
,
Bin Meng
,
2020/08/31
[PATCH v4 08/18] [automated] Move QOM typedefs and add missing includes
,
Eduardo Habkost
,
2020/08/31
[PATCH v4 11/18] [automated] Use DECLARE_*CHECKER* macros
,
Eduardo Habkost
,
2020/08/31
[PATCH v4 15/18] [automated] Use OBJECT_DECLARE_TYPE where possible
,
Eduardo Habkost
,
2020/08/31
[PATCH v4 13/18] [automated] Use DECLARE_*CHECKER* macros (pass 3)
,
Eduardo Habkost
,
2020/08/31
[PATCH v4 10/18] [automated] Move QOM typedefs and add missing includes (pass 3)
,
Eduardo Habkost
,
2020/08/31
Re: [Bug 1892540] [RFC PATCH v2] hw/display/tcx: Allow 64-bit accesses to framebuffer stippler and blitter
,
mst
,
2020/08/30
[PATCH v2 00/16] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Bin Meng
,
2020/08/29
[PATCH v2 01/16] target/riscv: cpu: Add a new 'resetvec' property
,
Bin Meng
,
2020/08/29
[PATCH v2 02/16] hw/riscv: hart: Add a new 'resetvec' property
,
Bin Meng
,
2020/08/29
[PATCH v2 03/16] target/riscv: cpu: Set reset vector based on the configured property value
,
Bin Meng
,
2020/08/29
[PATCH v2 04/16] hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board
,
Bin Meng
,
2020/08/29
[PATCH v2 05/16] hw/char: Add Microchip PolarFire SoC MMUART emulation
,
Bin Meng
,
2020/08/29
[PATCH v2 06/16] hw/riscv: microchip_pfsoc: Connect 5 MMUARTs
,
Bin Meng
,
2020/08/29
[PATCH v2 07/16] hw/sd: Add Cadence SDHCI emulation
,
Bin Meng
,
2020/08/29
[PATCH v2 08/16] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card
,
Bin Meng
,
2020/08/29
[PATCH v2 09/16] hw/dma: Add SiFive platform DMA controller emulation
,
Bin Meng
,
2020/08/29
[PATCH v2 10/16] hw/riscv: microchip_pfsoc: Connect a DMA controller
,
Bin Meng
,
2020/08/29
[PATCH v2 11/16] hw/net: cadence_gem: Add a new 'phy-addr' property
,
Bin Meng
,
2020/08/29
[PATCH v2 12/16] hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
,
Bin Meng
,
2020/08/29
[PATCH v2 13/16] hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
,
Bin Meng
,
2020/08/29
[PATCH v2 14/16] hw/riscv: microchip_pfsoc: Hook GPIO controllers
,
Bin Meng
,
2020/08/29
[PATCH v2 15/16] hw/riscv: clint: Avoid using hard-coded timebase frequency
,
Bin Meng
,
2020/08/29
[PATCH v2 16/16] hw/riscv: sifive_u: Connect a DMA controller
,
Bin Meng
,
2020/08/29
Re: [PATCH v2 00/16] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Leif Lindholm
,
2020/08/30
Re: [PATCH v2 00/16] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Bin Meng
,
2020/08/30
Re: [PATCH v2 00/16] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Leif Lindholm
,
2020/08/30
Re: [PATCH v3 00/74] qom: Automated conversion of type checking boilerplate
,
Eduardo Habkost
,
2020/08/27
[PATCH RFC v3 00/14] Add riscv kvm accel support
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 03/14] target/riscv: Implement function kvm_arch_init_vcpu
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 01/14] linux-header: Update linux/kvm.h
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 07/14] hw/riscv: PLIC update external interrupt by KVM when kvm enabled
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 06/14] target/riscv: Support start kernel directly by KVM
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 05/14] arget/riscv: Implement kvm_arch_put_registers
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 11/14] target/riscv: Support riscv cpu vmstate
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 14/14] target/riscv: Support virtual time context synchronization
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 02/14] target/riscv: Add target/riscv/kvm.c to place the public kvm interface
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 12/14] target/riscv: Add kvm_riscv_get/put_regs_timer
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 13/14] target/riscv: Implement virtual time adjusting with vm state changing
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 10/14] target/riscv: Add sifive_plic vmstate
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 08/14] target/riscv: Handler KVM_EXIT_RISCV_SBI exit
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 04/14] target/riscv: Implement kvm_arch_get_registers
,
Yifei Jiang
,
2020/08/27
[PATCH RFC v3 09/14] target/riscv: Add host cpu type
,
Yifei Jiang
,
2020/08/27
[RFC PATCH v4 0/2] Add file-backed and write-once features to OTP
,
Green Wan
,
2020/08/27
[RFC PATCH v4 1/2] hw/riscv: sifive_u: Add backend drive support
,
Green Wan
,
2020/08/27
Re: [RFC PATCH v4 1/2] hw/riscv: sifive_u: Add backend drive support
,
Bin Meng
,
2020/08/28
[RFC PATCH v4 2/2] hw/riscv: sifive_u: Add write-once protection
,
Green Wan
,
2020/08/27
Re: [RFC PATCH v4 2/2] hw/riscv: sifive_u: Add write-once protection
,
Bin Meng
,
2020/08/28
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Nathan Chancellor
,
2020/08/27
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Alistair Francis
,
2020/08/27
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Nathan Chancellor
,
2020/08/27
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Michael S. Tsirkin
,
2020/08/30
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Nathan Chancellor
,
2020/08/30
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Mark Cave-Ayland
,
2020/08/30
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Nathan Chancellor
,
2020/08/30
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Mark Cave-Ayland
,
2020/08/30
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Alistair Francis
,
2020/08/31
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Alistair Francis
,
2020/08/31
Re: [PATCH] memory: Revert "memory: accept mismatching sizes in memory_region_access_valid"
,
Michael S. Tsirkin
,
2020/08/30
[PATCH v3 64/74] [automated] Move QOM typedefs and add missing includes
,
Eduardo Habkost
,
2020/08/25
Re: [PATCH v3 64/74] [automated] Move QOM typedefs and add missing includes
,
Juan Quintela
,
2020/08/26
[PATCH v3 66/74] [automated] Use DECLARE_*CHECKER* macros
,
Eduardo Habkost
,
2020/08/25
Re: [PATCH v3 66/74] [automated] Use DECLARE_*CHECKER* macros
,
Juan Quintela
,
2020/08/26
[PATCH v3 62/74] [automated] Use TYPE_INFO macro
,
Eduardo Habkost
,
2020/08/25
Re: [PATCH v3 62/74] [automated] Use TYPE_INFO macro
,
Juan Quintela
,
2020/08/26
[PATCH v3 69/74] [automated] Use OBJECT_DECLARE_TYPE where possible
,
Eduardo Habkost
,
2020/08/25
[PATCH v3 09/74] sifive_u: Rename memmap enum constants
,
Eduardo Habkost
,
2020/08/25
[PATCH v3 07/74] opentitan: Rename memmap enum constants
,
Eduardo Habkost
,
2020/08/25
[PATCH v3 08/74] sifive_e: Rename memmap enum constants
,
Eduardo Habkost
,
2020/08/25
[PATCH] target/riscv: raise exception to HS-mode at get_physical_address
,
Yifei Jiang
,
2020/08/24
[PATCH v2] softfloat: add alternative sNaN propagation for fmax/fmin
,
Chih-Min Chao
,
2020/08/20
[PATCH v2 08/58] sifive_e: Rename memmap enum constants
,
Eduardo Habkost
,
2020/08/19
Re: [PATCH v2 08/58] sifive_e: Rename memmap enum constants
,
Daniel P . Berrangé
,
2020/08/25
[PATCH v2 09/58] sifive_u: Rename memmap enum constants
,
Eduardo Habkost
,
2020/08/19
Re: [PATCH v2 09/58] sifive_u: Rename memmap enum constants
,
Daniel P . Berrangé
,
2020/08/25
[PATCH v2 07/58] opentitan: Rename memmap enum constants
,
Eduardo Habkost
,
2020/08/19
Re: [PATCH v2 07/58] opentitan: Rename memmap enum constants
,
Daniel P . Berrangé
,
2020/08/25
[PATCH v2 7/7] target: Push BQL on ->cpu_exec_interrupt down into per-arch implementation
,
Robert Foley
,
2020/08/19
Re: [PATCH v2 7/7] target: Push BQL on ->cpu_exec_interrupt down into per-arch implementation
,
Richard Henderson
,
2020/08/31
[PATCH v2 6/7] target: rename all *_cpu_exec_interrupt functions to *_cpu_exec_interrupt_locked
,
Robert Foley
,
2020/08/19
Re: [PATCH v2 6/7] target: rename all *_cpu_exec_interrupt functions to *_cpu_exec_interrupt_locked
,
Richard Henderson
,
2020/08/31
[PATCH v2 4/7] target: Push BQL on ->do_interrupt down into per-arch implementation
,
Robert Foley
,
2020/08/19
Re: [PATCH v2 4/7] target: Push BQL on ->do_interrupt down into per-arch implementation
,
Richard Henderson
,
2020/08/31
[PATCH v2 1/7] target: rename all *_do_interupt functions to _do_interrupt_locked
,
Robert Foley
,
2020/08/19
Re: [PATCH v2 1/7] target: rename all *_do_interupt functions to _do_interrupt_locked
,
Richard Henderson
,
2020/08/31
[RFC PATCH v3 0/2] Add file-backed and write-once features to OTP
,
Green Wan
,
2020/08/18
[RFC PATCH v3 1/2] hw/riscv: sifive_u: Add backend drive support
,
Green Wan
,
2020/08/18
Re: [RFC PATCH v3 1/2] hw/riscv: sifive_u: Add backend drive support
,
Bin Meng
,
2020/08/26
[RFC PATCH v3 2/2] hw/riscv: sifive_u: Add write-once protection.
,
Green Wan
,
2020/08/18
Re: [RFC PATCH v3 2/2] hw/riscv: sifive_u: Add write-once protection.
,
Bin Meng
,
2020/08/26
[RFC v4 00/70] support vector extension v1.0
,
frank . chang
,
2020/08/17
[RFC v4 01/70] target/riscv: drop vector 0.7.1 and add 1.0 support
,
frank . chang
,
2020/08/17
[RFC v4 02/70] target/riscv: Use FIELD_EX32() to extract wd field
,
frank . chang
,
2020/08/17
[RFC v4 03/70] target/riscv: rvv-1.0: add mstatus VS field
,
frank . chang
,
2020/08/17
[RFC v4 04/70] target/riscv: rvv-1.0: add sstatus VS field
,
frank . chang
,
2020/08/17
[RFC v4 05/70] target/riscv: rvv-1.0: introduce writable misa.v field
,
frank . chang
,
2020/08/17
[RFC v4 06/70] target/riscv: rvv-1.0: add translation-time vector context status
,
frank . chang
,
2020/08/17
[RFC v4 07/70] target/riscv: rvv-1.0: remove rvv related codes from fcsr registers
,
frank . chang
,
2020/08/17
Re: [RFC v4 07/70] target/riscv: rvv-1.0: remove rvv related codes from fcsr registers
,
Richard Henderson
,
2020/08/29
[RFC v4 08/70] target/riscv: rvv-1.0: add vcsr register
,
frank . chang
,
2020/08/17
[RFC v4 09/70] target/riscv: rvv-1.0: add vlenb register
,
frank . chang
,
2020/08/17
[RFC v4 10/70] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers
,
frank . chang
,
2020/08/17
[RFC v4 11/70] target/riscv: rvv-1.0: remove MLEN calculations
,
frank . chang
,
2020/08/17
[RFC v4 12/70] target/riscv: rvv-1.0: add fractional LMUL
,
frank . chang
,
2020/08/17
Re: [RFC v4 12/70] target/riscv: rvv-1.0: add fractional LMUL
,
Richard Henderson
,
2020/08/29
[RFC v4 14/70] target/riscv: rvv-1.0: update check functions
,
frank . chang
,
2020/08/17
Re: [RFC v4 14/70] target/riscv: rvv-1.0: update check functions
,
Richard Henderson
,
2020/08/29
[RFC v4 13/70] target/riscv: rvv-1.0: add VMA and VTA
,
frank . chang
,
2020/08/17
[RFC v4 15/70] target/riscv: introduce more imm value modes in translator functions
,
frank . chang
,
2020/08/17
Re: [RFC v4 15/70] target/riscv: introduce more imm value modes in translator functions
,
Richard Henderson
,
2020/08/29
[RFC v4 16/70] target/riscv: rvv:1.0: add translation-time nan-box helper function
,
frank . chang
,
2020/08/17
Re: [RFC v4 16/70] target/riscv: rvv:1.0: add translation-time nan-box helper function
,
Richard Henderson
,
2020/08/29
[RFC v4 17/70] target/riscv: rvv-1.0: configure instructions
,
frank . chang
,
2020/08/17
[RFC v4 18/70] target/riscv: rvv-1.0: stride load and store instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 18/70] target/riscv: rvv-1.0: stride load and store instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 19/70] target/riscv: rvv-1.0: index load and store instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 19/70] target/riscv: rvv-1.0: index load and store instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 20/70] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns
,
frank . chang
,
2020/08/17
Re: [RFC v4 20/70] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns
,
Richard Henderson
,
2020/08/29
[RFC v4 21/70] target/riscv: rvv-1.0: fault-only-first unit stride load
,
frank . chang
,
2020/08/17
Re: [RFC v4 21/70] target/riscv: rvv-1.0: fault-only-first unit stride load
,
Richard Henderson
,
2020/08/29
[RFC v4 22/70] target/riscv: rvv-1.0: amo operations
,
frank . chang
,
2020/08/17
Re: [RFC v4 22/70] target/riscv: rvv-1.0: amo operations
,
Richard Henderson
,
2020/08/29
[RFC v4 23/70] target/riscv: rvv-1.0: load/store whole register instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 23/70] target/riscv: rvv-1.0: load/store whole register instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 24/70] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
,
frank . chang
,
2020/08/17
Re: [RFC v4 24/70] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
,
Richard Henderson
,
2020/08/29
[RFC v4 25/70] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation
,
frank . chang
,
2020/08/17
Re: [RFC v4 25/70] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation
,
Richard Henderson
,
2020/08/29
[RFC v4 26/70] target/riscv: rvv-1.0: floating-point square-root instruction
,
frank . chang
,
2020/08/17
[RFC v4 27/70] target/riscv: rvv-1.0: floating-point classify instructions
,
frank . chang
,
2020/08/17
[RFC v4 28/70] target/riscv: rvv-1.0: mask population count instruction
,
frank . chang
,
2020/08/17
[RFC v4 29/70] target/riscv: rvv-1.0: find-first-set mask bit instruction
,
frank . chang
,
2020/08/17
[RFC v4 30/70] target/riscv: rvv-1.0: set-X-first mask bit instructions
,
frank . chang
,
2020/08/17
[RFC v4 31/70] target/riscv: rvv-1.0: iota instruction
,
frank . chang
,
2020/08/17
[RFC v4 32/70] target/riscv: rvv-1.0: element index instruction
,
frank . chang
,
2020/08/17
[RFC v4 33/70] target/riscv: rvv-1.0: allow load element with sign-extended
,
frank . chang
,
2020/08/17
[RFC v4 34/70] target/riscv: rvv-1.0: register gather instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 34/70] target/riscv: rvv-1.0: register gather instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 35/70] target/riscv: rvv-1.0: integer scalar move instructions
,
frank . chang
,
2020/08/17
[RFC v4 36/70] target/riscv: rvv-1.0: floating-point move instruction
,
frank . chang
,
2020/08/17
Re: [RFC v4 36/70] target/riscv: rvv-1.0: floating-point move instruction
,
Richard Henderson
,
2020/08/29
Re: [RFC v4 36/70] target/riscv: rvv-1.0: floating-point move instruction
,
Richard Henderson
,
2020/08/29
[RFC v4 37/70] target/riscv: rvv-1.0: floating-point scalar move instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 37/70] target/riscv: rvv-1.0: floating-point scalar move instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 38/70] target/riscv: rvv-1.0: whole register move instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 38/70] target/riscv: rvv-1.0: whole register move instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 39/70] target/riscv: rvv-1.0: integer extension instructions
,
frank . chang
,
2020/08/17
[RFC v4 40/70] target/riscv: rvv-1.0: single-width averaging add and subtract instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 40/70] target/riscv: rvv-1.0: single-width averaging add and subtract instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 41/70] target/riscv: rvv-1.0: single-width bit shift instructions
,
frank . chang
,
2020/08/17
[RFC v4 43/70] target/riscv: rvv-1.0: narrowing integer right shift instructions
,
frank . chang
,
2020/08/17
[RFC v4 42/70] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow
,
frank . chang
,
2020/08/17
Re: [RFC v4 42/70] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow
,
Richard Henderson
,
2020/08/29
[RFC v4 44/70] target/riscv: rvv-1.0: widening integer multiply-add instructions
,
frank . chang
,
2020/08/17
[RFC v4 45/70] target/riscv: rvv-1.0: add Zvqmac extension
,
frank . chang
,
2020/08/17
Re: [RFC v4 45/70] target/riscv: rvv-1.0: add Zvqmac extension
,
Richard Henderson
,
2020/08/29
Re: [RFC v4 45/70] target/riscv: rvv-1.0: add Zvqmac extension
,
Richard Henderson
,
2020/08/29
[RFC v4 46/70] target/riscv: rvv-1.0: quad-widening integer multiply-add instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 46/70] target/riscv: rvv-1.0: quad-widening integer multiply-add instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 47/70] target/riscv: rvv-1.0: single-width saturating add and subtract instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 47/70] target/riscv: rvv-1.0: single-width saturating add and subtract instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 48/70] target/riscv: rvv-1.0: integer comparison instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 48/70] target/riscv: rvv-1.0: integer comparison instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 49/70] target/riscv: use softfloat lib float16 comparison functions
,
frank . chang
,
2020/08/17
[RFC v4 50/70] target/riscv: rvv-1.0: floating-point compare instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 50/70] target/riscv: rvv-1.0: floating-point compare instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 51/70] target/riscv: rvv-1.0: mask-register logical instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 51/70] target/riscv: rvv-1.0: mask-register logical instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 52/70] target/riscv: rvv-1.0: slide instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 52/70] target/riscv: rvv-1.0: slide instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 53/70] target/riscv: rvv-1.0: floating-point slide instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 53/70] target/riscv: rvv-1.0: floating-point slide instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 54/70] target/riscv: rvv-1.0: narrowing fixed-point clip instructions
,
frank . chang
,
2020/08/17
[RFC v4 55/70] target/riscv: rvv-1.0: single-width floating-point reduction
,
frank . chang
,
2020/08/17
Re: [RFC v4 55/70] target/riscv: rvv-1.0: single-width floating-point reduction
,
Richard Henderson
,
2020/08/29
Re: [RFC v4 55/70] target/riscv: rvv-1.0: single-width floating-point reduction
,
Richard Henderson
,
2020/08/29
Re: [RFC v4 55/70] target/riscv: rvv-1.0: single-width floating-point reduction
,
Chih-Min Chao
,
2020/08/31
[RFC v4 56/70] target/riscv: rvv-1.0: widening floating-point reduction instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 56/70] target/riscv: rvv-1.0: widening floating-point reduction instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 57/70] target/riscv: rvv-1.0: single-width scaling shift instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 57/70] target/riscv: rvv-1.0: single-width scaling shift instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 58/70] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add
,
frank . chang
,
2020/08/17
[RFC v4 59/70] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf
,
frank . chang
,
2020/08/17
[RFC v4 61/70] target/riscv: rvv-1.0: floating-point min/max instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 61/70] target/riscv: rvv-1.0: floating-point min/max instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 60/70] target/riscv: rvv-1.0: remove integer extract instruction
,
frank . chang
,
2020/08/17
[RFC v4 62/70] target/riscv: introduce floating-point rounding mode enum
,
frank . chang
,
2020/08/17
Re: [RFC v4 62/70] target/riscv: introduce floating-point rounding mode enum
,
Richard Henderson
,
2020/08/29
[RFC v4 63/70] target/riscv: rvv-1.0: floating-point/integer type-convert instructions
,
frank . chang
,
2020/08/17
Re: [RFC v4 63/70] target/riscv: rvv-1.0: floating-point/integer type-convert instructions
,
Richard Henderson
,
2020/08/29
[RFC v4 64/70] target/riscv: rvv-1.0: widening floating-point/integer type-convert
,
frank . chang
,
2020/08/17
Re: [RFC v4 64/70] target/riscv: rvv-1.0: widening floating-point/integer type-convert
,
Richard Henderson
,
2020/08/29
[RFC v4 65/70] target/riscv: add "set round to odd" rounding mode helper function
,
frank . chang
,
2020/08/17
Re: [RFC v4 65/70] target/riscv: add "set round to odd" rounding mode helper function
,
Richard Henderson
,
2020/08/29
[RFC v4 66/70] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert
,
frank . chang
,
2020/08/17
Re: [RFC v4 66/70] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert
,
Richard Henderson
,
2020/08/29
[RFC v4 67/70] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 512-bits
,
frank . chang
,
2020/08/17
Re: [RFC v4 67/70] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 512-bits
,
Richard Henderson
,
2020/08/29
[RFC v4 68/70] target/riscv: gdb: modify gdb csr xml file to align with csr register map
,
frank . chang
,
2020/08/17
Re: [RFC v4 68/70] target/riscv: gdb: modify gdb csr xml file to align with csr register map
,
Richard Henderson
,
2020/08/29
[RFC v4 69/70] target/riscv: gdb: support vector registers for rv64
,
frank . chang
,
2020/08/17
Re: [RFC v4 69/70] target/riscv: gdb: support vector registers for rv64
,
Richard Henderson
,
2020/08/29
[RFC v4 70/70] target/riscv: gdb: support vector registers for rv32
,
frank . chang
,
2020/08/17
Re: [RFC v4 70/70] target/riscv: gdb: support vector registers for rv32
,
Richard Henderson
,
2020/08/29
Re: [RFC v4 00/70] support vector extension v1.0
,
Frank Chang
,
2020/08/25
Re: [RFC v4 00/70] support vector extension v1.0
,
Alistair Francis
,
2020/08/26
Re: [RFC v4 00/70] support vector extension v1.0
,
Frank Chang
,
2020/08/26
Re: [RFC v4 00/70] support vector extension v1.0
,
Alistair Francis
,
2020/08/26
Re: [RFC v4 00/70] support vector extension v1.0
,
Frank Chang
,
2020/08/26
Re: [RFC v4 00/70] support vector extension v1.0
,
Alistair Francis
,
2020/08/26
[PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Bin Meng
,
2020/08/14
[PATCH 01/18] target/riscv: cpu: Add a new 'resetvec' property
,
Bin Meng
,
2020/08/14
Re: [PATCH 01/18] target/riscv: cpu: Add a new 'resetvec' property
,
Alistair Francis
,
2020/08/17
[PATCH 02/18] hw/riscv: hart: Add a new 'resetvec' property
,
Bin Meng
,
2020/08/14
Re: [PATCH 02/18] hw/riscv: hart: Add a new 'resetvec' property
,
Alistair Francis
,
2020/08/17
[PATCH 03/18] target/riscv: cpu: Set reset vector based on the configured property value
,
Bin Meng
,
2020/08/14
Re: [PATCH 03/18] target/riscv: cpu: Set reset vector based on the configured property value
,
Alistair Francis
,
2020/08/17
[PATCH 04/18] hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board
,
Bin Meng
,
2020/08/14
Re: [PATCH 04/18] hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board
,
Alistair Francis
,
2020/08/17
[PATCH 05/18] hw/char: Add Microchip PolarFire SoC MMUART emulation
,
Bin Meng
,
2020/08/14
Re: [PATCH 05/18] hw/char: Add Microchip PolarFire SoC MMUART emulation
,
Alistair Francis
,
2020/08/17
[PATCH 06/18] hw/riscv: microchip_pfsoc: Connect 5 MMUARTs
,
Bin Meng
,
2020/08/14
Re: [PATCH 06/18] hw/riscv: microchip_pfsoc: Connect 5 MMUARTs
,
Alistair Francis
,
2020/08/17
[PATCH 07/18] hw/sd: sd: Fix incorrect populated function switch status data structure
,
Bin Meng
,
2020/08/14
Re: [PATCH 07/18] hw/sd: sd: Fix incorrect populated function switch status data structure
,
Philippe Mathieu-Daudé
,
2020/08/15
RE: [PATCH 07/18] hw/sd: sd: Fix incorrect populated function switch status data structure
,
Sai Pavan Boddu
,
2020/08/18
Re: [PATCH 07/18] hw/sd: sd: Fix incorrect populated function switch status data structure
,
Sai Pavan Boddu
,
2020/08/21
Re: [PATCH 07/18] hw/sd: sd: Fix incorrect populated function switch status data structure
,
Bin Meng
,
2020/08/21
RE: [PATCH 07/18] hw/sd: sd: Fix incorrect populated function switch status data structure
,
Sai Pavan Boddu
,
2020/08/24
[PATCH 08/18] hw/sd: sd: Correctly set the high capacity bit
,
Bin Meng
,
2020/08/14
Re: [PATCH 08/18] hw/sd: sd: Correctly set the high capacity bit
,
Philippe Mathieu-Daudé
,
2020/08/15
Re: [PATCH 08/18] hw/sd: sd: Correctly set the high capacity bit
,
Bin Meng
,
2020/08/16
[PATCH 09/18] hw/sd: sdhci: Make sdhci_poweron_reset() internal visible
,
Bin Meng
,
2020/08/14
Re: [PATCH 09/18] hw/sd: sdhci: Make sdhci_poweron_reset() internal visible
,
Philippe Mathieu-Daudé
,
2020/08/15
Re: [PATCH 09/18] hw/sd: sdhci: Make sdhci_poweron_reset() internal visible
,
Bin Meng
,
2020/08/16
Re: [PATCH 09/18] hw/sd: sdhci: Make sdhci_poweron_reset() internal visible
,
Philippe Mathieu-Daudé
,
2020/08/16
[PATCH 10/18] hw/sd: Add Cadence SDHCI emulation
,
Bin Meng
,
2020/08/14
Re: [PATCH 10/18] hw/sd: Add Cadence SDHCI emulation
,
Philippe Mathieu-Daudé
,
2020/08/15
[PATCH 11/18] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card
,
Bin Meng
,
2020/08/14
Re: [PATCH 11/18] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card
,
Philippe Mathieu-Daudé
,
2020/08/15
[PATCH 12/18] hw/dma: Add Microchip PolarFire Soc DMA controller emulation
,
Bin Meng
,
2020/08/14
[PATCH 13/18] hw/riscv: microchip_pfsoc: Connect a DMA controller
,
Bin Meng
,
2020/08/14
Re: [PATCH 13/18] hw/riscv: microchip_pfsoc: Connect a DMA controller
,
Philippe Mathieu-Daudé
,
2020/08/15
Re: [PATCH 13/18] hw/riscv: microchip_pfsoc: Connect a DMA controller
,
Bin Meng
,
2020/08/16
Re: [PATCH 13/18] hw/riscv: microchip_pfsoc: Connect a DMA controller
,
Philippe Mathieu-Daudé
,
2020/08/16
[PATCH 14/18] hw/net: cadence_gem: Add a new 'phy-addr' property
,
Bin Meng
,
2020/08/14
Re: [PATCH 14/18] hw/net: cadence_gem: Add a new 'phy-addr' property
,
Philippe Mathieu-Daudé
,
2020/08/15
Re: [PATCH 14/18] hw/net: cadence_gem: Add a new 'phy-addr' property
,
Bin Meng
,
2020/08/16
Re: [PATCH 14/18] hw/net: cadence_gem: Add a new 'phy-addr' property
,
Philippe Mathieu-Daudé
,
2020/08/16
Re: [PATCH 14/18] hw/net: cadence_gem: Add a new 'phy-addr' property
,
Nathan Rossi
,
2020/08/16
Re: [PATCH 14/18] hw/net: cadence_gem: Add a new 'phy-addr' property
,
Bin Meng
,
2020/08/16
Re: [PATCH 14/18] hw/net: cadence_gem: Add a new 'phy-addr' property
,
Philippe Mathieu-Daudé
,
2020/08/16
[PATCH 15/18] hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
,
Bin Meng
,
2020/08/14
Re: [PATCH 15/18] hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
,
Alistair Francis
,
2020/08/21
[PATCH 16/18] hw/riscv: microchip_pfsoc: Hook GPIO controllers
,
Bin Meng
,
2020/08/14
Re: [PATCH 16/18] hw/riscv: microchip_pfsoc: Hook GPIO controllers
,
Alistair Francis
,
2020/08/21
[PATCH 17/18] hw/riscv: clint: Avoid using hard-coded timebase frequency
,
Bin Meng
,
2020/08/14
Re: [PATCH 17/18] hw/riscv: clint: Avoid using hard-coded timebase frequency
,
Alistair Francis
,
2020/08/25
[PATCH 18/18] hw/riscv: microchip_pfsoc: Document the software used for testing
,
Bin Meng
,
2020/08/14
Re: [PATCH 18/18] hw/riscv: microchip_pfsoc: Document the software used for testing
,
Alistair Francis
,
2020/08/21
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Anup Patel
,
2020/08/14
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Bin Meng
,
2020/08/17
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Cyril.Jean
,
2020/08/17
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Alistair Francis
,
2020/08/17
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Cyril.Jean
,
2020/08/17
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Anup Patel
,
2020/08/18
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Cyril.Jean
,
2020/08/18
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Anup Patel
,
2020/08/18
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Bin Meng
,
2020/08/18
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Cyril.Jean
,
2020/08/19
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
Alistair Francis
,
2020/08/21
Re: [PATCH 00/18] hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support
,
no-reply
,
2020/08/14
Re: QEMU latest release riscv32-softmmu not working
,
Philippe Mathieu-Daudé
,
2020/08/14
Re: QEMU latest release riscv32-softmmu not working
,
Chih-Min Chao
,
2020/08/14
Re: QEMU latest release riscv32-softmmu not working
,
arman avetisyan
,
2020/08/14
[PATCH] target/riscv: Fix bug in getting trap cause name for trace_riscv_trap
,
Yifei Jiang
,
2020/08/13
Re: [PATCH] target/riscv: Fix bug in getting trap cause name for trace_riscv_trap
,
no-reply
,
2020/08/14
Re: [PATCH] target/riscv: Fix bug in getting trap cause name for trace_riscv_trap
,
Alistair Francis
,
2020/08/17
Re: [PATCH 3/3] softfloat: add fp16 and uint8/int8 interconvert functions
,
Richard Henderson
,
2020/08/13
Re: [PATCH 2/3] softfloat: add APIs to handle alternative sNaN propagation
,
Richard Henderson
,
2020/08/13
Re: [PATCH 2/3] softfloat: add APIs to handle alternative sNaN propagation
,
Chih-Min Chao
,
2020/08/14
Re: [PATCH 2/3] softfloat: add APIs to handle alternative sNaN propagation
,
Richard Henderson
,
2020/08/14
[PULL 0/9] Tracing patches
,
Stefan Hajnoczi
,
2020/08/13
[PULL 1/9] scripts/tracetool: Fix dtrace generation for macOS
,
Stefan Hajnoczi
,
2020/08/13
[PULL 2/9] scripts/tracetool: Use void pointer for vcpu
,
Stefan Hajnoczi
,
2020/08/13
[PULL 4/9] net/colo: Match is-enabled probe to tracepoint
,
Stefan Hajnoczi
,
2020/08/13
[PULL 3/9] build: Don't make object files for dtrace on macOS
,
Stefan Hajnoczi
,
2020/08/13
[PULL 5/9] softmmu: Add missing trace-events file
,
Stefan Hajnoczi
,
2020/08/13
[PULL 6/9] scripts/cleanup-trace-events: Fix for vcpu property
,
Stefan Hajnoczi
,
2020/08/13
[PULL 7/9] scripts/cleanup-trace-events: Emit files in alphabetical order
,
Stefan Hajnoczi
,
2020/08/13
[PULL 8/9] trace-events: Delete unused trace points
,
Stefan Hajnoczi
,
2020/08/13
[PULL 9/9] trace-events: Fix attribution of trace points to source
,
Stefan Hajnoczi
,
2020/08/13
Re: [PULL 0/9] Tracing patches
,
no-reply
,
2020/08/13
Re: [PULL 0/9] Tracing patches
,
no-reply
,
2020/08/13
Re: [PULL 0/9] Tracing patches
,
Stefan Hajnoczi
,
2020/08/13
Re: [PULL 0/9] Tracing patches
,
Peter Maydell
,
2020/08/21
Re: [PATCH 3/3] target/riscv: Update MTINST/HTINST CSR in riscv_cpu_do_interrupt()
,
Alistair Francis
,
2020/08/12
Re: [PATCH 3/3] target/riscv: Update MTINST/HTINST CSR in riscv_cpu_do_interrupt()
,
Richard Henderson
,
2020/08/13
Re: [PATCH 1/3] target/riscv: Optional feature to provide trapped instruction in CSRs
,
Alistair Francis
,
2020/08/12
[PATCH v3 00/13] RISC-V: Update the Hypervisor spec to v0.6.1
,
Alistair Francis
,
2020/08/12
[PATCH v3 01/13] target/riscv: Allow setting a two-stage lookup in the virt status
,
Alistair Francis
,
2020/08/12
[PATCH v3 02/13] target/riscv: Allow generating hlv/hlvx/hsv instructions
,
Alistair Francis
,
2020/08/12
[PATCH v3 03/13] target/riscv: Do two-stage lookups on hlv/hlvx/hsv instructions
,
Alistair Francis
,
2020/08/12
[PATCH v3 04/13] target/riscv: Don't allow guest to write to htinst
,
Alistair Francis
,
2020/08/12
[PATCH v3 05/13] target/riscv: Convert MSTATUS MTL to GVA
,
Alistair Francis
,
2020/08/12
[PATCH v3 06/13] target/riscv: Fix the interrupt cause code
,
Alistair Francis
,
2020/08/12
[PATCH v3 07/13] target/riscv: Update the Hypervisor trap return/entry
,
Alistair Francis
,
2020/08/12
[PATCH v3 08/13] target/riscv: Update the CSRs to the v0.6 Hyp extension
,
Alistair Francis
,
2020/08/12
[PATCH v3 09/13] target/riscv: Only support a single VSXL length
,
Alistair Francis
,
2020/08/12
[PATCH v3 11/13] target/riscv: Support the v0.6 Hypervisor extension CRSs
,
Alistair Francis
,
2020/08/12
[PATCH v3 10/13] target/riscv: Only support little endian guests
,
Alistair Francis
,
2020/08/12
[PATCH v3 12/13] target/riscv: Return the exception from invalid CSR accesses
,
Alistair Francis
,
2020/08/12
[PATCH v3 13/13] target/riscv: Support the Virtual Instruction fault
,
Alistair Francis
,
2020/08/12
Re: [PATCH v3 00/13] RISC-V: Update the Hypervisor spec to v0.6.1
,
LIU Zhiwei
,
2020/08/12
Re: [PATCH v3 00/13] RISC-V: Update the Hypervisor spec to v0.6.1
,
Alistair Francis
,
2020/08/13
Re: [PATCH v1 3/3] hw/intc: ibex_plic: Honour source priorities
,
Philippe Mathieu-Daudé
,
2020/08/12
Re: [PATCH v1 1/3] hw/intc: ibex_plic: Update the pending irqs
,
Philippe Mathieu-Daudé
,
2020/08/12
Re: [PATCH 1/3] softfloat: target/riscv: implement full set fp16 comparision
,
Alistair Francis
,
2020/08/12
Re: [PATCH 1/3] softfloat: target/riscv: implement full set fp16 comparision
,
Richard Henderson
,
2020/08/13
Re: [PATCH v1 0/3] hw/intc: A few fixes for the Ibex PLIC
,
Alistair Francis
,
2020/08/12
[PATCH 0/3] RFC: target/riscv: add half-precision floating-point extension
,
Chih-Min Chao
,
2020/08/11
[PATCH 1/3] target/riscv: add NaN-Boxing helper for half-float
,
Chih-Min Chao
,
2020/08/11
[PATCH 2/3] target/riscv: Implement zfh extension
,
Chih-Min Chao
,
2020/08/11
Re: [PATCH 2/3] target/riscv: Implement zfh extension
,
Alistair Francis
,
2020/08/25
[PATCH 3/3] target/riscv: support 'x-k' in cpu option
,
Chih-Min Chao
,
2020/08/11
[PATCH v2 4/4] Add a config option for ePMP.
,
Hou Weiying
,
2020/08/10
[PATCH v2 1/4] Define ePMP mseccfg
,
Hou Weiying
,
2020/08/10
Re: [PATCH v2 1/4] Define ePMP mseccfg
,
Alistair Francis
,
2020/08/25
[PATCH v2 2/4] Implementation of enhanced PMP(ePMP) support
,
Hou Weiying
,
2020/08/10
[PATCH v2 3/4] Add ePMP CSR accesses
,
Hou Weiying
,
2020/08/10
[PATCH v2 0/4] riscv: Add enhanced PMP support
,
Hou Weiying
,
2020/08/10
Re: [PATCH 2/3] target/riscv: Fix write_htinst() implementation
,
Alistair Francis
,
2020/08/10
Re: [RFC PATCH v2 1/2] hw/riscv: sifive_u: Add file-backed OTP.
,
Alistair Francis
,
2020/08/10
Re: [RFC PATCH v2 1/2] hw/riscv: sifive_u: Add file-backed OTP.
,
Green Wan
,
2020/08/13
Re: [RFC PATCH v2 1/2] hw/riscv: sifive_u: Add file-backed OTP.
,
Alistair Francis
,
2020/08/13
Re: [RFC PATCH v2 1/2] hw/riscv: sifive_u: Add file-backed OTP.
,
Green Wan
,
2020/08/18
[PATCH 4/4] Add a config option for ePMP.
,
Hou Weiying
,
2020/08/08
[PATCH 4/4] Add a config option for ePMP.
,
Hou Weiying
,
2020/08/08
[PATCH] riscv: Fix bug in setting pmpcfg CSR for RISCV64
,
Hou Weiying
,
2020/08/08
Re: [PATCH] riscv: Fix bug in setting pmpcfg CSR for RISCV64
,
Alistair Francis
,
2020/08/10
[PATCH] riscv: Fix bug in setting pmpcfg CSR for RISCV64
,
Hou Weiying
,
2020/08/08
[PATCH 2/4] Implementation of enhanced PMP(ePMP) support
,
Hou Weiying
,
2020/08/08
[PATCH 2/4] Implementation of enhanced PMP(ePMP) support
,
Hou Weiying
,
2020/08/08
[PATCH 1/4] Define ePMP mseccfg
,
Hou Weiying
,
2020/08/08
[PATCH 1/4] Define ePMP mseccfg
,
Hou Weiying
,
2020/08/08
[PATCH 0/4] riscv: Add enhanced PMP support
,
Hou Weiying
,
2020/08/08
[PATCH 0/4] riscv: Add enhanced PMP support
,
Hou Weiying
,
2020/08/08
[PATCH 0/4] riscv: Add enhanced PMP support
,
Hongzheng-Li
,
2020/08/08
[PATCH 1/4] Define ePMP mseccfg
,
Hongzheng-Li
,
2020/08/08
[PATCH 4/4] Add a config option for ePMP.
,
Hongzheng-Li
,
2020/08/08
[PATCH 2/4] Implementation of enhanced PMP(ePMP) support
,
Hongzheng-Li
,
2020/08/08
[PATCH 3/4] Add ePMP CSR accesses
,
Hongzheng-Li
,
2020/08/08
[PATCH 3/4] Add ePMP CSR accesses
,
Hou Weiying
,
2020/08/08
[PATCH 3/4] Add ePMP CSR accesses
,
Hou Weiying
,
2020/08/08
[RFC v3 00/71] target/riscv: support vector extension v1.0
,
frank . chang
,
2020/08/06
[RFC v3 01/71] target/riscv: drop vector 0.7.1 and add 1.0 support
,
frank . chang
,
2020/08/06
[RFC v3 02/71] target/riscv: Use FIELD_EX32() to extract wd field
,
frank . chang
,
2020/08/06
[RFC v3 03/71] target/riscv: rvv-1.0: add mstatus VS field
,
frank . chang
,
2020/08/06
[RFC v3 04/71] target/riscv: rvv-1.0: add sstatus VS field
,
frank . chang
,
2020/08/06
[RFC v3 05/71] target/riscv: rvv-1.0: introduce writable misa.v field
,
frank . chang
,
2020/08/06
Re: [RFC v3 05/71] target/riscv: rvv-1.0: introduce writable misa.v field
,
Richard Henderson
,
2020/08/06
[RFC v3 06/71] target/riscv: rvv-1.0: add translation-time vector context status
,
frank . chang
,
2020/08/06
[RFC v3 07/71] target/riscv: rvv-1.0: remove vxrm and vxsat fields from fcsr register
,
frank . chang
,
2020/08/06
Re: [RFC v3 07/71] target/riscv: rvv-1.0: remove vxrm and vxsat fields from fcsr register
,
Richard Henderson
,
2020/08/06
Re: [RFC v3 07/71] target/riscv: rvv-1.0: remove vxrm and vxsat fields from fcsr register
,
Richard Henderson
,
2020/08/06
[RFC v3 08/71] target/riscv: rvv-1.0: add vcsr register
,
frank . chang
,
2020/08/06
[RFC v3 09/71] target/riscv: rvv-1.0: add vlenb register
,
frank . chang
,
2020/08/06
[RFC v3 10/71] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers
,
frank . chang
,
2020/08/06
Re: [RFC v3 10/71] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers
,
Richard Henderson
,
2020/08/06
[RFC v3 11/71] target/riscv: rvv-1.0: remove MLEN calculations
,
frank . chang
,
2020/08/06
[RFC v3 12/71] target/riscv: rvv-1.0: add fractional LMUL
,
frank . chang
,
2020/08/06
Re: [RFC v3 12/71] target/riscv: rvv-1.0: add fractional LMUL
,
Richard Henderson
,
2020/08/06
Re: [RFC v3 12/71] target/riscv: rvv-1.0: add fractional LMUL
,
Frank Chang
,
2020/08/13
[RFC v3 13/71] target/riscv: rvv-1.0: add VMA and VTA
,
frank . chang
,
2020/08/06
Re: [RFC v3 13/71] target/riscv: rvv-1.0: add VMA and VTA
,
Richard Henderson
,
2020/08/06
[RFC v3 14/71] target/riscv: rvv-1.0: update check functions
,
frank . chang
,
2020/08/06
[RFC v3 16/71] target/riscv: add fp16 nan-box check generator function
,
frank . chang
,
2020/08/06
Re: [RFC v3 16/71] target/riscv: add fp16 nan-box check generator function
,
Richard Henderson
,
2020/08/06
[RFC v3 15/71] target/riscv: introduce more imm value modes in translator functions
,
frank . chang
,
2020/08/06
Re: [RFC v3 15/71] target/riscv: introduce more imm value modes in translator functions
,
Richard Henderson
,
2020/08/06
[RFC v3 17/71] target/riscv: rvv:1.0: add translation-time nan-box helper function
,
frank . chang
,
2020/08/06
Re: [RFC v3 17/71] target/riscv: rvv:1.0: add translation-time nan-box helper function
,
Richard Henderson
,
2020/08/06
[RFC v3 18/71] target/riscv: rvv-1.0: apply nanbox helper in opfvf_trans
,
frank . chang
,
2020/08/06
Re: [RFC v3 18/71] target/riscv: rvv-1.0: apply nanbox helper in opfvf_trans
,
Richard Henderson
,
2020/08/06
[RFC v3 19/71] target/riscv: rvv-1.0: configure instructions
,
frank . chang
,
2020/08/06
Re: [RFC v3 19/71] target/riscv: rvv-1.0: configure instructions
,
Richard Henderson
,
2020/08/06
[RFC v3 20/71] target/riscv: rvv-1.0: stride load and store instructions
,
frank . chang
,
2020/08/06
[RFC v3 21/71] target/riscv: rvv-1.0: index load and store instructions
,
frank . chang
,
2020/08/06
[RFC v3 22/71] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns
,
frank . chang
,
2020/08/06
[RFC v3 23/71] target/riscv: rvv-1.0: fault-only-first unit stride load
,
frank . chang
,
2020/08/06
[RFC v3 24/71] target/riscv: rvv-1.0: amo operations
,
frank . chang
,
2020/08/06
[RFC v3 25/71] target/riscv: rvv-1.0: load/store whole register instructions
,
frank . chang
,
2020/08/06
[RFC v3 26/71] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
,
frank . chang
,
2020/08/06
Re: [RFC v3 26/71] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
,
Richard Henderson
,
2020/08/06
Re: [RFC v3 26/71] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
,
Frank Chang
,
2020/08/13
Re: [RFC v3 26/71] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
,
Richard Henderson
,
2020/08/14
Re: [RFC v3 26/71] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
,
Frank Chang
,
2020/08/15
Re: [RFC v3 26/71] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
,
Frank Chang
,
2020/08/15
Re: [RFC v3 26/71] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
,
Richard Henderson
,
2020/08/15
Re: [RFC v3 26/71] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns
,
Frank Chang
,
2020/08/15
[RFC v3 28/71] target/riscv: rvv-1.0: floating-point square-root instruction
,
frank . chang
,
2020/08/06
[RFC v3 27/71] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation
,
frank . chang
,
2020/08/06
[RFC v3 29/71] target/riscv: rvv-1.0: floating-point classify instructions
,
frank . chang
,
2020/08/06
[RFC v3 30/71] target/riscv: rvv-1.0: mask population count instruction
,
frank . chang
,
2020/08/06
[RFC v3 31/71] target/riscv: rvv-1.0: find-first-set mask bit instruction
,
frank . chang
,
2020/08/06
[RFC v3 32/71] target/riscv: rvv-1.0: set-X-first mask bit instructions
,
frank . chang
,
2020/08/06
[RFC v3 33/71] target/riscv: rvv-1.0: iota instruction
,
frank . chang
,
2020/08/06
[RFC v3 34/71] target/riscv: rvv-1.0: element index instruction
,
frank . chang
,
2020/08/06
[RFC v3 35/71] target/riscv: rvv-1.0: allow load element with sign-extended
,
frank . chang
,
2020/08/06
[RFC v3 36/71] target/riscv: rvv-1.0: register gather instructions
,
frank . chang
,
2020/08/06
[RFC v3 37/71] target/riscv: rvv-1.0: integer scalar move instructions
,
frank . chang
,
2020/08/06
[RFC v3 38/71] target/riscv: rvv-1.0: floating-point move instruction
,
frank . chang
,
2020/08/06
[RFC v3 39/71] target/riscv: rvv-1.0: floating-point scalar move instructions
,
frank . chang
,
2020/08/06
[RFC v3 41/71] target/riscv: rvv-1.0: integer extension instructions
,
frank . chang
,
2020/08/06
[RFC v3 40/71] target/riscv: rvv-1.0: whole register move instructions
,
frank . chang
,
2020/08/06
[RFC v3 42/71] target/riscv: rvv-1.0: single-width averaging add and subtract instructions
,
frank . chang
,
2020/08/06
[RFC v3 43/71] target/riscv: rvv-1.0: single-width bit shift instructions
,
frank . chang
,
2020/08/06
[RFC v3 44/71] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow
,
frank . chang
,
2020/08/06
[RFC v3 45/71] target/riscv: rvv-1.0: narrowing integer right shift instructions
,
frank . chang
,
2020/08/06
[RFC v3 46/71] target/riscv: rvv-1.0: widening integer multiply-add instructions
,
frank . chang
,
2020/08/06
[RFC v3 47/71] target/riscv: rvv-1.0: add Zvqmac extension
,
frank . chang
,
2020/08/06
[RFC v3 48/71] target/riscv: rvv-1.0: quad-widening integer multiply-add instructions
,
frank . chang
,
2020/08/06
[RFC v3 49/71] target/riscv: rvv-1.0: single-width saturating add and subtract instructions
,
frank . chang
,
2020/08/06
[RFC v3 50/71] target/riscv: rvv-1.0: integer comparison instructions
,
frank . chang
,
2020/08/06
[RFC v3 51/71] target/riscv: use softfloat lib float16 comparison functions
,
frank . chang
,
2020/08/06
[RFC v3 52/71] target/riscv: rvv-1.0: floating-point compare instructions
,
frank . chang
,
2020/08/06
[RFC v3 53/71] target/riscv: rvv-1.0: mask-register logical instructions
,
frank . chang
,
2020/08/06
[RFC v3 54/71] target/riscv: rvv-1.0: slide instructions
,
frank . chang
,
2020/08/06
[RFC v3 55/71] target/riscv: rvv-1.0: floating-point slide instructions
,
frank . chang
,
2020/08/06
[RFC v3 56/71] target/riscv: rvv-1.0: narrowing fixed-point clip instructions
,
frank . chang
,
2020/08/06
[RFC v3 57/71] target/riscv: rvv-1.0: single-width floating-point reduction
,
frank . chang
,
2020/08/06
[RFC v3 58/71] target/riscv: rvv-1.0: widening floating-point reduction instructions
,
frank . chang
,
2020/08/06
[RFC v3 59/71] target/riscv: rvv-1.0: single-width scaling shift instructions
,
frank . chang
,
2020/08/06
[RFC v3 60/71] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add
,
frank . chang
,
2020/08/06
[RFC v3 61/71] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf
,
frank . chang
,
2020/08/06
[RFC v3 62/71] target/riscv: rvv-1.0: remove integer extract instruction
,
frank . chang
,
2020/08/06
[RFC v3 63/71] target/riscv: rvv-1.0: floating-point min/max instructions
,
frank . chang
,
2020/08/06
[RFC v3 64/71] target/riscv: introduce floating-point rounding mode enum
,
frank . chang
,
2020/08/06
[RFC v3 65/71] target/riscv: rvv-1.0: floating-point/integer type-convert instructions
,
frank . chang
,
2020/08/06
[RFC v3 67/71] target/riscv: add "set round to odd" rounding mode helper function
,
frank . chang
,
2020/08/06
[RFC v3 66/71] target/riscv: rvv-1.0: widening floating-point/integer type-convert
,
frank . chang
,
2020/08/06
[RFC v3 68/71] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert
,
frank . chang
,
2020/08/06
[RFC v3 69/71] target/riscv: gdb: modify gdb csr xml file to align with csr register map
,
frank . chang
,
2020/08/06
[RFC v3 70/71] target/riscv: gdb: support vector registers for rv64
,
frank . chang
,
2020/08/06
[RFC v3 71/71] target/riscv: gdb: support vector registers for rv32
,
frank . chang
,
2020/08/06
Re: [PATCH v2 7/7] target/riscv: check before allocating TCG temps
,
Chih-Min Chao
,
2020/08/06
Re: [PATCH v2 6/7] target/riscv: Clean up fmv.w.x
,
Chih-Min Chao
,
2020/08/06
Re: [PATCH v2 5/7] target/riscv: Check nanboxed inputs in trans_rvf.inc.c
,
Chih-Min Chao
,
2020/08/06
Re: [PATCH v2 5/7] target/riscv: Check nanboxed inputs in trans_rvf.inc.c
,
Chih-Min Chao
,
2020/08/07
Re: [PATCH v2 5/7] target/riscv: Check nanboxed inputs in trans_rvf.inc.c
,
LIU Zhiwei
,
2020/08/08
Re: [PATCH v2 5/7] target/riscv: Check nanboxed inputs in trans_rvf.inc.c
,
LIU Zhiwei
,
2020/08/08
Re: [PATCH v2 4/7] target/riscv: Check nanboxed inputs to fp helpers
,
Chih-Min Chao
,
2020/08/06
Re: [PATCH v2 3/7] target/riscv: Generate nanboxed results from trans_rvf.inc.c
,
Chih-Min Chao
,
2020/08/06
Re: [PATCH v2 2/7] target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s
,
Chih-Min Chao
,
2020/08/06
Re: [PATCH v2 1/7] target/riscv: Generate nanboxed results from fp helpers
,
Chih-Min Chao
,
2020/08/06
Re: [PATCH v2 1/7] target/riscv: Generate nanboxed results from fp helpers
,
LIU Zhiwei
,
2020/08/06
Re: [PATCH v2 1/7] target/riscv: Generate nanboxed results from fp helpers
,
Chih-Min Chao
,
2020/08/06
Re: [PATCH v2 1/7] target/riscv: Generate nanboxed results from fp helpers
,
LIU Zhiwei
,
2020/08/06
[PATCH v1 15/21] target/riscv: add BQL to do_interrupt and cpu_exec_interrupt
,
Robert Foley
,
2020/08/05
Re: [PATCH v6 4/4] target/riscv: Change the TLB page size depends on PMP entries.
,
Zong Li
,
2020/08/04
Re: [PATCH v6 4/4] target/riscv: Change the TLB page size depends on PMP entries.
,
Alistair Francis
,
2020/08/12
Re: [PATCH v6 4/4] target/riscv: Change the TLB page size depends on PMP entries.
,
Zong Li
,
2020/08/12
Re: [PATCH v6 4/4] target/riscv: Change the TLB page size depends on PMP entries.
,
Alistair Francis
,
2020/08/13
Re: [RFC v2 50/76] target/riscv: rvv-0.9: single-width saturating add and subtract instructions
,
Frank Chang
,
2020/08/03
Re: [RFC v2 50/76] target/riscv: rvv-0.9: single-width saturating add and subtract instructions
,
Richard Henderson
,
2020/08/05
[PATCH] target/riscv/vector_helper: Fix build on 32-bit big endian targets
,
Thomas Huth
,
2020/08/03
Re: [RFC v2 75/76] target/riscv: gdb: support vector registers for rv64
,
Alex Bennée
,
2020/08/03
Re: [RFC v2 59/76] target/riscv: rvv-0.9: floating-point slide instructions
,
Frank Chang
,
2020/08/03
Re: [RFC v2 59/76] target/riscv: rvv-0.9: floating-point slide instructions
,
Richard Henderson
,
2020/08/03
[PATCH v6 0/6] riscv: Switch to use generic platform fw_dynamic type opensbi bios images
,
Bin Meng
,
2020/08/03
[PATCH v6 2/6] roms/opensbi: Upgrade from v0.7 to v0.8
,
Bin Meng
,
2020/08/03
[PATCH v6 1/6] configure: Create symbolic links for pc-bios/*.elf files
,
Bin Meng
,
2020/08/03
[PATCH v6 3/6] roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware
,
Bin Meng
,
2020/08/03
[PATCH v6 4/6] hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u
,
Bin Meng
,
2020/08/03
[PATCH v6 5/6] hw/riscv: spike: Change the default bios to use generic platform image
,
Bin Meng
,
2020/08/03
[PATCH v6 6/6] gitlab-ci/opensbi: Update GitLab CI to build generic platform
,
Bin Meng
,
2020/08/03
Re: [PATCH v6 0/6] riscv: Switch to use generic platform fw_dynamic type opensbi bios images
,
Alistair Francis
,
2020/08/11
Re: [PATCH v4 4/7] hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u
,
Bin Meng
,
2020/08/03
Re: [PATCH v4 4/7] hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u
,
Alistair Francis
,
2020/08/11
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