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[PATCH v2 04/15] riscv: virt: Remove target macro conditionals
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From: |
Alistair Francis |
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Subject: |
[PATCH v2 04/15] riscv: virt: Remove target macro conditionals |
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Date: |
Tue, 8 Dec 2020 14:56:19 -0800 |
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
---
include/hw/riscv/virt.h | 6 ------
hw/riscv/virt.c | 2 +-
2 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index b4ed9a32eb..84b7a3848f 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -89,10 +89,4 @@ enum {
#define FDT_INT_MAP_WIDTH (FDT_PCI_ADDR_CELLS + FDT_PCI_INT_CELLS + 1 + \
FDT_PLIC_ADDR_CELLS + FDT_PLIC_INT_CELLS)
-#if defined(TARGET_RISCV32)
-#define VIRT_CPU TYPE_RISCV_CPU_BASE32
-#elif defined(TARGET_RISCV64)
-#define VIRT_CPU TYPE_RISCV_CPU_BASE64
-#endif
-
#endif
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 25cea7aa67..995e1c35f1 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -706,7 +706,7 @@ static void virt_machine_class_init(ObjectClass *oc, void
*data)
mc->desc = "RISC-V VirtIO board";
mc->init = virt_machine_init;
mc->max_cpus = VIRT_CPUS_MAX;
- mc->default_cpu_type = VIRT_CPU;
+ mc->default_cpu_type = TYPE_RISCV_CPU_BASE;
mc->pci_allow_0_address = true;
mc->possible_cpu_arch_ids = riscv_numa_possible_cpu_arch_ids;
mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props;
--
2.29.2
- [PATCH v2 00/15] RISC-V: Start to remove xlen preprocess, Alistair Francis, 2020/12/08
- [PATCH v2 01/15] hw/riscv: Expand the is 32-bit check to support more CPUs, Alistair Francis, 2020/12/08
- [PATCH v2 02/15] target/riscv: Add a TYPE_RISCV_CPU_BASE CPU, Alistair Francis, 2020/12/08
- [PATCH v2 03/15] riscv: spike: Remove target macro conditionals, Alistair Francis, 2020/12/08
- [PATCH v2 04/15] riscv: virt: Remove target macro conditionals,
Alistair Francis <=
- [PATCH v2 06/15] hw/riscv: virt: Remove compile time XLEN checks, Alistair Francis, 2020/12/08
- [PATCH v2 05/15] hw/riscv: boot: Remove compile time XLEN checks, Alistair Francis, 2020/12/08
- [PATCH v2 08/15] hw/riscv: sifive_u: Remove compile time XLEN checks, Alistair Francis, 2020/12/08
- [PATCH v2 07/15] hw/riscv: spike: Remove compile time XLEN checks, Alistair Francis, 2020/12/08
- [PATCH v2 09/15] target/riscv: fpu_helper: Match function defs in HELPER macros, Alistair Francis, 2020/12/08
- [PATCH v2 11/15] target/riscv: Specify the XLEN for CPUs, Alistair Francis, 2020/12/08