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From: | Richard Henderson |
Subject: | Re: [PATCH v3 07/20] target/riscv: Adjust csr write mask with XLEN |
Date: | Thu, 11 Nov 2021 12:21:57 +0100 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 |
On 11/11/21 6:57 AM, LIU Zhiwei wrote:
Write mask is representing the bits we care about. Signed-off-by: LIU Zhiwei<zhiwei_liu@c-sky.com> --- target/riscv/insn_trans/trans_rvi.c.inc | 4 ++-- target/riscv/op_helper.c | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
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