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[PATCH v10 49/77] target/riscv: rvv-1.0: mask-register logical instructi
From: |
frank . chang |
Subject: |
[PATCH v10 49/77] target/riscv: rvv-1.0: mask-register logical instructions |
Date: |
Mon, 29 Nov 2021 11:03:09 +0800 |
From: Frank Chang <frank.chang@sifive.com>
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/insn_trans/trans_rvv.c.inc | 3 ++-
target/riscv/vector_helper.c | 4 ----
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
b/target/riscv/insn_trans/trans_rvv.c.inc
index 804f423d5bb..5c0c3d25478 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -2652,7 +2652,8 @@ GEN_OPFVV_WIDEN_TRANS(vfwredsum_vs, reduction_check)
#define GEN_MM_TRANS(NAME) \
static bool trans_##NAME(DisasContext *s, arg_r *a) \
{ \
- if (vext_check_isa_ill(s)) { \
+ if (require_rvv(s) && \
+ vext_check_isa_ill(s)) { \
uint32_t data = 0; \
gen_helper_gvec_4_ptr *fn = gen_helper_##NAME; \
TCGLabel *over = gen_new_label(); \
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 71d7b1e8796..f883fdf4749 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -4231,7 +4231,6 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1,
\
void *vs2, CPURISCVState *env, \
uint32_t desc) \
{ \
- uint32_t vlmax = env_archcpu(env)->cfg.vlen; \
uint32_t vl = env->vl; \
uint32_t i; \
int a, b; \
@@ -4241,9 +4240,6 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1,
\
b = vext_elem_mask(vs2, i); \
vext_set_elem_mask(vd, i, OP(b, a)); \
} \
- for (; i < vlmax; i++) { \
- vext_set_elem_mask(vd, i, 0); \
- } \
}
#define DO_NAND(N, M) (!(N & M))
--
2.25.1
- [PATCH v10 37/77] target/riscv: rvv-1.0: floating-point move instruction, (continued)
- [PATCH v10 37/77] target/riscv: rvv-1.0: floating-point move instruction, frank . chang, 2021/11/28
- [PATCH v10 39/77] target/riscv: rvv-1.0: whole register move instructions, frank . chang, 2021/11/28
- [PATCH v10 38/77] target/riscv: rvv-1.0: floating-point scalar move instructions, frank . chang, 2021/11/28
- [PATCH v10 40/77] target/riscv: rvv-1.0: integer extension instructions, frank . chang, 2021/11/28
- [PATCH v10 41/77] target/riscv: rvv-1.0: single-width averaging add and subtract instructions, frank . chang, 2021/11/28
- [PATCH v10 42/77] target/riscv: rvv-1.0: single-width bit shift instructions, frank . chang, 2021/11/28
- [PATCH v10 43/77] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow, frank . chang, 2021/11/28
- [PATCH v10 44/77] target/riscv: rvv-1.0: narrowing integer right shift instructions, frank . chang, 2021/11/28
- [PATCH v10 46/77] target/riscv: rvv-1.0: single-width saturating add and subtract instructions, frank . chang, 2021/11/28
- [PATCH v10 47/77] target/riscv: rvv-1.0: integer comparison instructions, frank . chang, 2021/11/28
- [PATCH v10 49/77] target/riscv: rvv-1.0: mask-register logical instructions,
frank . chang <=
- [PATCH v10 50/77] target/riscv: rvv-1.0: slide instructions, frank . chang, 2021/11/28
- [PATCH v10 51/77] target/riscv: rvv-1.0: floating-point slide instructions, frank . chang, 2021/11/28
- [PATCH v10 54/77] target/riscv: rvv-1.0: widening floating-point reduction instructions, frank . chang, 2021/11/28
- [PATCH v10 55/77] target/riscv: rvv-1.0: single-width scaling shift instructions, frank . chang, 2021/11/28
- [PATCH v10 57/77] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf, frank . chang, 2021/11/28
- [PATCH v10 58/77] target/riscv: rvv-1.0: remove integer extract instruction, frank . chang, 2021/11/28
- [PATCH v10 59/77] target/riscv: rvv-1.0: floating-point min/max instructions, frank . chang, 2021/11/28
- [PATCH v10 61/77] target/riscv: rvv-1.0: floating-point/integer type-convert instructions, frank . chang, 2021/11/28
- [PATCH v10 62/77] target/riscv: rvv-1.0: widening floating-point/integer type-convert, frank . chang, 2021/11/28
- [PATCH v10 63/77] target/riscv: add "set round to odd" rounding mode helper function, frank . chang, 2021/11/28