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Re: [PATCH v2 2/5] target/riscv: Update VS timer whenever htimedelta cha
From: |
Alistair Francis |
Subject: |
Re: [PATCH v2 2/5] target/riscv: Update VS timer whenever htimedelta changes |
Date: |
Thu, 8 Dec 2022 13:29:59 +1000 |
On Tue, Nov 8, 2022 at 11:07 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> The htimedelta[h] CSR has impact on the VS timer comparison so we
> should call riscv_timer_write_timecmp() whenever htimedelta changes.
>
> Fixes: 3ec0fe18a31f ("target/riscv: Add vstimecmp suppor")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
This patch breaks my Xvisor test. When running OpenSBI and Xvisor like this:
qemu-system-riscv64 -machine virt \
-m 1G -serial mon:stdio -serial null -nographic \
-append 'vmm.console=uart@10000000 vmm.bootcmd="vfs mount initrd
/;vfs run /boot.xscript;vfs cat /system/banner.txt; guest kick guest0;
vserial bind guest0/uart0"' \
-smp 4 -d guest_errors \
-bios none \
-device loader,file=./images/qemuriscv64/vmm.bin,addr=0x80200000 \
-kernel ./images/qemuriscv64/fw_jump.elf \
-initrd ./images/qemuriscv64/vmm-disk-linux.img -cpu rv64,h=true
Running:
Xvisor v0.3.0-129-gbc33f339 (Jan 1 1970 00:00:00)
I see this failure:
INIT: bootcmd: guest kick guest0
guest0: Kicked
INIT: bootcmd: vserial bind guest0/uart0
[guest0/uart0] cpu_vcpu_stage2_map: guest_phys=0x000000003B9AC000
size=0x4096 map failed
do_error: CPU3: VCPU=guest0/vcpu0 page fault failed (error -1)
zero=0x0000000000000000 ra=0x0000000080001B4E
sp=0x000000008001CF80 gp=0x0000000000000000
tp=0x0000000000000000 s0=0x000000008001CFB0
s1=0x0000000000000000 a0=0x0000000010001048
a1=0x0000000000000000 a2=0x0000000000989680
a3=0x000000003B9ACA00 a4=0x0000000000000048
a5=0x0000000000000000 a6=0x0000000000019000
a7=0x0000000000000000 s2=0x0000000000000000
s3=0x0000000000000000 s4=0x0000000000000000
s5=0x0000000000000000 s6=0x0000000000000000
s7=0x0000000000000000 s8=0x0000000000000000
s9=0x0000000000000000 s10=0x0000000000000000
s11=0x0000000000000000 t0=0x0000000000004000
t1=0x0000000000000100 t2=0x0000000000000000
t3=0x0000000000000000 t4=0x0000000000000000
t5=0x0000000000000000 t6=0x0000000000000000
sepc=0x0000000080001918 sstatus=0x0000000200004120
hstatus=0x00000002002001C0 sp_exec=0x0000000010A64000
scause=0x0000000000000017 stval=0x000000003B9ACAF8
htval=0x000000000EE6B2BE htinst=0x0000000000D03021
I have tried updating to a newer Xvisor release, but with that I don't
get any serial output.
Can you help get the Xvisor tests back up and running?
Alistair
- Re: [PATCH v2 2/5] target/riscv: Update VS timer whenever htimedelta changes,
Alistair Francis <=