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[PATCH v2 04/11] target/riscv: remove RISCV_FEATURE_MISA
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v2 04/11] target/riscv: remove RISCV_FEATURE_MISA |
Date: |
Tue, 14 Feb 2023 16:23:49 -0300 |
This enum is no longer used after write_misa() started reading the value
from cpu->cfg.misa_w.
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/cpu.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index fe572b83e9..00a464c9c4 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -89,7 +89,6 @@ enum {
RISCV_FEATURE_MMU,
RISCV_FEATURE_PMP,
RISCV_FEATURE_EPMP,
- RISCV_FEATURE_MISA,
RISCV_FEATURE_DEBUG
};
--
2.39.1
- [PATCH v2 00/11] enable write_misa() and RISCV_FEATURE_* cleanups, Daniel Henrique Barboza, 2023/02/14
- [PATCH v2 01/11] target/riscv: do not mask unsupported QEMU extensions in write_misa(), Daniel Henrique Barboza, 2023/02/14
- [PATCH v2 02/11] target/riscv: introduce riscv_cpu_cfg(), Daniel Henrique Barboza, 2023/02/14
- [PATCH v2 03/11] target/riscv: allow users to actually write the MISA CSR, Daniel Henrique Barboza, 2023/02/14
- [PATCH v2 04/11] target/riscv: remove RISCV_FEATURE_MISA,
Daniel Henrique Barboza <=
- [PATCH v2 05/11] target/riscv: remove RISCV_FEATURE_DEBUG, Daniel Henrique Barboza, 2023/02/14
- [PATCH v2 06/11] target/riscv/cpu.c: error out if EPMP is enabled without PMP, Daniel Henrique Barboza, 2023/02/14
- [PATCH v2 07/11] target/riscv: remove RISCV_FEATURE_EPMP, Daniel Henrique Barboza, 2023/02/14
- [PATCH v2 08/11] target/riscv: remove RISCV_FEATURE_PMP, Daniel Henrique Barboza, 2023/02/14
- [PATCH v2 09/11] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus(), Daniel Henrique Barboza, 2023/02/14