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qemu-riscv (date)
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Last Modified: Tue Feb 28 2023 12:49:18 -0500
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February 28, 2023
Re: [PATCH v4 17/31] tcg: Don't re-use TEMP_TB temporaries
,
Alex Bennée
,
12:49
Re: [PATCH v4 07/31] tcg: Add liveness_pass_0
,
Alex Bennée
,
12:29
Re: [PATCH V4 5/8] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Igor Mammedov
,
11:52
Re: [PATCH] target/riscv: Convert epmp from feature to ratified smepmp extension
,
Himanshu Chauhan
,
11:10
Re: [PATCH] target/riscv: Convert epmp from feature to ratified smepmp extension
,
Daniel Henrique Barboza
,
10:53
[PATCH v2 18/18] target/riscv: Group all predicate() routines together
,
Bin Meng
,
08:46
[PATCH v2 17/18] target/riscv: Drop priv level check in mseccfg predicate()
,
Bin Meng
,
08:46
[PATCH v2 16/18] target/riscv: Allow debugger to access sstc CSRs
,
Bin Meng
,
08:46
[PATCH v2 15/18] target/riscv: Allow debugger to access {h, s}stateen CSRs
,
Bin Meng
,
08:46
[PATCH v2 13/18] target/riscv: Allow debugger to access user timer and counter CSRs
,
Bin Meng
,
08:46
[PATCH v2 14/18] target/riscv: Allow debugger to access seed CSR
,
Bin Meng
,
08:45
[PATCH v2 12/18] target/riscv: gdbstub: Drop the vector CSRs in riscv-vector.xml
,
Bin Meng
,
08:45
Re: [PATCH] hw/riscv: Fix the bug of maximum size limit when put initrd to RAM
,
Daniel Henrique Barboza
,
08:18
Re: [PATCH v7 03/10] target/riscv: allow MISA writes as experimental
,
LIU Zhiwei
,
07:40
Re: [PATCH v2 03/18] target/riscv: Use g_assert() for the predicate() NULL check
,
liweiwei
,
07:17
[PATCH v2 11/18] target/riscv: gdbstub: Turn on debugger mode before calling CSR predicate()
,
Bin Meng
,
07:17
[PATCH v2 10/18] target/riscv: Avoid reporting odd-numbered pmpcfgX in the CSR XML for RV64
,
Bin Meng
,
07:16
[PATCH v2 09/18] target/riscv: Simplify getting RISCVCPU pointer from env
,
Bin Meng
,
07:16
[PATCH v2 08/18] target/riscv: Simplify {read, write}_pmpcfg() a little bit
,
Bin Meng
,
07:16
[PATCH v2 07/18] target/riscv: Use 'bool' type for read_only
,
Bin Meng
,
07:16
Re: [PATCH v7 03/10] target/riscv: allow MISA writes as experimental
,
liweiwei
,
07:10
Re: [PATCH v2 02/18] target/riscv: Add some comments to clarify the priority policy of riscv_csrrw_check()
,
liweiwei
,
07:07
[PATCH v2 06/18] target/riscv: Coding style fixes in csr.c
,
Bin Meng
,
05:47
[PATCH v2 05/18] target/riscv: gdbstub: Do not generate CSR XML if Zicsr is disabled
,
Bin Meng
,
05:46
[PATCH v2 04/18] target/riscv: gdbstub: Minor change for better readability
,
Bin Meng
,
05:45
[PATCH v2 03/18] target/riscv: Use g_assert() for the predicate() NULL check
,
Bin Meng
,
05:44
[PATCH v2 02/18] target/riscv: Add some comments to clarify the priority policy of riscv_csrrw_check()
,
Bin Meng
,
05:43
[PATCH v2 01/18] target/riscv: gdbstub: Check priv spec version before reporting CSR
,
Bin Meng
,
05:42
[PATCH v2 00/18] target/riscv: Various fixes to gdbstub and CSR access
,
Bin Meng
,
05:41
Re: [PATCH v2 2/2] hw/riscv: Move the dtb load bits outside of create_fdt()
,
Daniel Henrique Barboza
,
04:16
Re: [PATCH v7 03/10] target/riscv: allow MISA writes as experimental
,
Bin Meng
,
03:08
[PATCH v2 2/2] hw/riscv: Move the dtb load bits outside of create_fdt()
,
Bin Meng
,
02:46
[PATCH v2 1/2] hw/riscv: Skip re-generating DT nodes for a given DTB
,
Bin Meng
,
02:46
Re: [PATCH V4 5/8] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Sunil V L
,
02:34
February 27, 2023
Re: Re: [PATCH] hw/riscv: Fix the bug of maximum size limit when put initrd to RAM
,
Hang Xu
,
22:44
RE: [PATCH 19/70] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op
,
Taylor Simpson
,
17:39
Re: [PATCH 19/70] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op
,
Richard Henderson
,
17:01
RE: [PATCH 16/70] target/hexagon/idef-parser: Use gen_tmp for LPCFG
,
Taylor Simpson
,
16:56
RE: [PATCH 15/70] target/hexagon: Use tcg_constant_* for gen_constant_from_imm
,
Taylor Simpson
,
16:56
RE: [PATCH 17/70] target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign
,
Taylor Simpson
,
16:55
RE: [PATCH 18/70] target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred
,
Taylor Simpson
,
16:55
RE: [PATCH 19/70] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op
,
Taylor Simpson
,
16:55
RE: [PATCH v2 28/76] target/hexagon/idef-parser: Drop HexValue.is_manual
,
Taylor Simpson
,
14:19
RE: [PATCH v2 27/76] target/hexagon/idef-parser: Drop tcg_temp_free
,
Taylor Simpson
,
13:01
RE: [PATCH v2 26/76] target/hexagon: Drop tcg_temp_free from gen_tcg_funcs.py
,
Taylor Simpson
,
12:57
RE: [PATCH v2 25/76] target/hexagon: Drop tcg_temp_free from C code
,
Taylor Simpson
,
12:54
RE: [PATCH v4 23/31] target/hexagon/idef-parser: Drop gen_tmp_local
,
Taylor Simpson
,
12:35
RE: [PATCH v4 22/31] target/hexagon: Don't use tcg_temp_local_new_*
,
Taylor Simpson
,
12:34
Re: [PATCH V4 5/8] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Igor Mammedov
,
10:41
Re: [PATCH] hw/riscv: Fix the bug of maximum size limit when put initrd to RAM
,
Daniel Henrique Barboza
,
08:29
[PULL 006/123] target/cpu: Restrict do_transaction_failed() handlers to sysemu
,
Philippe Mathieu-Daudé
,
07:39
[PULL 005/123] target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu
,
Philippe Mathieu-Daudé
,
07:39
Re: [PATCH v3 3/3] hw/riscv: Validate cluster and NUMA node boundary
,
Daniel Henrique Barboza
,
07:39
Re: [PULL] Fourth RISC-V PR for QEMU 8.0, Attempt 2
,
Peter Maydell
,
06:50
Re: [PATCH] Fix slli_uw decoding
,
Philipp Tomsich
,
04:33
Re: [PATCH 67/70] target/xtensa: Avoid tcg_const_i32
,
Max Filippov
,
04:31
Re: [PATCH 66/70] target/xtensa: Split constant in bit shift
,
Max Filippov
,
04:28
Re: [PATCH 65/70] target/xtensa: Use tcg_gen_subfi_i32 in translate_sll
,
Max Filippov
,
04:26
Re: [PATCH 64/70] target/xtensa: Avoid tcg_const_i32 in translate_l32r
,
Max Filippov
,
04:24
Re: [PATCH 63/70] target/xtensa: Tidy translate_clamps
,
Max Filippov
,
04:22
Re: [PATCH 62/70] target/xtensa: Tidy translate_bb
,
Max Filippov
,
04:19
Re: [PATCH 50/70] target/s390x: Split out gen_ri2
,
Philippe Mathieu-Daudé
,
04:09
Re: [PATCH 45/70] target/riscv: Avoid tcg_const_*
,
Philippe Mathieu-Daudé
,
04:05
Re: [PATCH 22/70] target/i386: Simplify POPF
,
Philippe Mathieu-Daudé
,
04:05
[PATCH] Fix slli_uw decoding
,
Ivan Klokov
,
04:05
Re: [PATCH 29/70] target/microblaze: Avoid tcg_const_* throughout
,
Philippe Mathieu-Daudé
,
03:56
Re: [PATCH 1/2] gitlab/opensbi: Move to docker:stable
,
Thomas Huth
,
03:49
Re: [PATCH v4 23/31] target/hexagon/idef-parser: Drop gen_tmp_local
,
Philippe Mathieu-Daudé
,
02:19
Re: [PATCH 58/70] target/tricore: Use min/max for saturate
,
Richard Henderson
,
00:54
[PATCH 70/70] tcg: Drop tcg_const_*
,
Richard Henderson
,
00:49
[PATCH 69/70] tcg: Drop tcg_const_*_vec
,
Richard Henderson
,
00:49
[PATCH 68/70] tcg: Replace tcg_const_i64 in tcg-op.c
,
Richard Henderson
,
00:49
[PATCH 67/70] target/xtensa: Avoid tcg_const_i32
,
Richard Henderson
,
00:49
[PATCH 62/70] target/xtensa: Tidy translate_bb
,
Richard Henderson
,
00:49
[PATCH 66/70] target/xtensa: Split constant in bit shift
,
Richard Henderson
,
00:49
[PATCH 64/70] target/xtensa: Avoid tcg_const_i32 in translate_l32r
,
Richard Henderson
,
00:49
[PATCH 60/70] target/tricore: Drop some temp initialization
,
Richard Henderson
,
00:49
[PATCH 61/70] target/tricore: Avoid tcg_const_i32
,
Richard Henderson
,
00:49
[PATCH 59/70] target/tricore: Use setcondi instead of explicit allocation
,
Richard Henderson
,
00:49
[PATCH 57/70] target/tricore: Rename t_off10 and use tcg_constant_i32
,
Richard Henderson
,
00:49
[PATCH 56/70] target/tricore: Split t_n as constant from temp as variable
,
Richard Henderson
,
00:49
[PATCH 65/70] target/xtensa: Use tcg_gen_subfi_i32 in translate_sll
,
Richard Henderson
,
00:49
[PATCH 63/70] target/xtensa: Tidy translate_clamps
,
Richard Henderson
,
00:49
[PATCH 58/70] target/tricore: Use min/max for saturate
,
Richard Henderson
,
00:49
[PATCH 55/70] target/sparc: Avoid tcg_const_{tl,i32}
,
Richard Henderson
,
00:49
[PATCH 54/70] tcg/sparc: Avoid tcg_const_tl in gen_edge
,
Richard Henderson
,
00:48
[PATCH 52/70] target/sh4: Avoid tcg_const_i32 for TAS.B
,
Richard Henderson
,
00:48
[PATCH 53/70] target/sh4: Avoid tcg_const_i32
,
Richard Henderson
,
00:48
[PATCH 50/70] target/s390x: Split out gen_ri2
,
Richard Henderson
,
00:48
[PATCH 49/70] target/rx: Avoid tcg_const_i32
,
Richard Henderson
,
00:48
[PATCH 51/70] target/s390x: Avoid tcg_const_i64
,
Richard Henderson
,
00:48
[PATCH 44/70] target/ppc: Avoid tcg_const_* in translate.c
,
Richard Henderson
,
00:48
[PATCH 46/70] target/rx: Use tcg_gen_abs_i32
,
Richard Henderson
,
00:48
[PATCH 48/70] target/rx: Avoid tcg_const_i32 when new temp needed
,
Richard Henderson
,
00:48
[PATCH 47/70] target/rx: Use cpu_psw_z as temp in flags computation
,
Richard Henderson
,
00:48
[PATCH 45/70] target/riscv: Avoid tcg_const_*
,
Richard Henderson
,
00:48
[PATCH 43/70] target/ppc: Fix gen_tlbsx_booke206
,
Richard Henderson
,
00:48
[PATCH 42/70] target/ppc: Rewrite trans_ADDG6S
,
Richard Henderson
,
00:48
[PATCH 41/70] target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc
,
Richard Henderson
,
00:47
[PATCH 40/70] target/ppc: Avoid tcg_const_* in fp-impl.c.inc
,
Richard Henderson
,
00:47
[PATCH 39/70] target/ppc: Avoid tcg_const_* in vsx-impl.c.inc
,
Richard Henderson
,
00:44
[PATCH 38/70] target/ppc: Avoid tcg_const_* in xxeval
,
Richard Henderson
,
00:44
[PATCH 37/70] target/ppc: Avoid tcg_const_* in vmx-impl.c.inc
,
Richard Henderson
,
00:44
[PATCH 36/70] target/ppc: Avoid tcg_const_i64 in do_vcntmb
,
Richard Henderson
,
00:44
[PATCH 35/70] target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad
,
Richard Henderson
,
00:44
[PATCH 34/70] target/ppc: Split out gen_vx_vmul10
,
Richard Henderson
,
00:44
[PATCH 32/70] target/mips: Avoid tcg_const_tl in gen_r6_ld
,
Richard Henderson
,
00:44
[PATCH 31/70] target/mips: Split out gen_lxr
,
Richard Henderson
,
00:44
[PATCH 33/70] target/mips: Avoid tcg_const_* throughout
,
Richard Henderson
,
00:44
[PATCH 29/70] target/microblaze: Avoid tcg_const_* throughout
,
Richard Henderson
,
00:44
[PATCH 28/70] target/m68k: Avoid tcg_const_* throughout
,
Richard Henderson
,
00:44
[PATCH 30/70] target/mips: Split out gen_lxl
,
Richard Henderson
,
00:44
[PATCH 27/70] target/m68k: Avoid tcg_const_i32 in bfop_reg
,
Richard Henderson
,
00:44
[PATCH 26/70] target/m68k: Avoid tcg_const_i32 when modified
,
Richard Henderson
,
00:44
[PATCH 24/70] target/m68k: Reject immediate as destination in gen_ea_mode
,
Richard Henderson
,
00:44
[PATCH 23/70] target/i386: Avoid use of tcg_const_* throughout
,
Richard Henderson
,
00:44
[PATCH 25/70] target/m68k: Use tcg_constant_i32 in gen_ea_mode
,
Richard Henderson
,
00:43
[PATCH 22/70] target/i386: Simplify POPF
,
Richard Henderson
,
00:43
[PATCH 21/70] target/hppa: Avoid use of tcg_const_i32 throughout
,
Richard Henderson
,
00:43
[PATCH 19/70] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op
,
Richard Henderson
,
00:43
[PATCH 20/70] target/hppa: Avoid tcg_const_i64 in trans_fid_f
,
Richard Henderson
,
00:43
[PATCH 18/70] target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred
,
Richard Henderson
,
00:43
[PATCH 17/70] target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign
,
Richard Henderson
,
00:43
[PATCH 16/70] target/hexagon/idef-parser: Use gen_tmp for LPCFG
,
Richard Henderson
,
00:43
[PATCH 15/70] target/hexagon: Use tcg_constant_* for gen_constant_from_imm
,
Richard Henderson
,
00:43
[PATCH 14/70] target/cris: Avoid use of tcg_const_i32 throughout
,
Richard Henderson
,
00:43
[PATCH 13/70] target/avr: Avoid use of tcg_const_i32 throughout
,
Richard Henderson
,
00:43
[PATCH 12/70] target/avr: Avoid use of tcg_const_i32 in SBIC, SBIS
,
Richard Henderson
,
00:43
[PATCH 11/70] target/arm: Avoid tcg_const_ptr in handle_rev
,
Richard Henderson
,
00:43
[PATCH 10/70] target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn
,
Richard Henderson
,
00:43
[PATCH 09/70] target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn
,
Richard Henderson
,
00:43
[PATCH 08/70] target/arm: Avoid tcg_const_* in translate-mve.c
,
Richard Henderson
,
00:43
[PATCH 06/70] target/arm: Improve trans_BFCI
,
Richard Henderson
,
00:43
[PATCH 07/70] target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}
,
Richard Henderson
,
00:43
[PATCH 05/70] target/arm: Create gen_set_rmode, gen_restore_rmode
,
Richard Henderson
,
00:43
[PATCH 04/70] target/arm: Consistently use ARMFPRounding during translation
,
Richard Henderson
,
00:43
[PATCH 03/70] target/arm: Improve arm_rmode_to_sf
,
Richard Henderson
,
00:42
[PATCH 02/70] target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf
,
Richard Henderson
,
00:42
[PATCH 01/70] target/arm: Use rmode >= 0 for need_rmode
,
Richard Henderson
,
00:42
[PATCH 00/70] tcg: Remove tcg_const_*
,
Richard Henderson
,
00:42
[PATCH v4 31/31] tcg: Update docs/devel/tcg-ops.rst for temporary changes
,
Richard Henderson
,
00:39
[PATCH v4 30/31] tcg: Remove tcg_temp_local_new_*, tcg_const_local_*
,
Richard Henderson
,
00:39
[PATCH v4 26/31] target/mips: Don't use tcg_temp_local_new
,
Richard Henderson
,
00:39
[PATCH v4 25/31] target/i386: Don't use tcg_temp_local_new
,
Richard Henderson
,
00:39
[PATCH v4 23/31] target/hexagon/idef-parser: Drop gen_tmp_local
,
Richard Henderson
,
00:39
[PATCH v4 21/31] target/cris: Don't use tcg_temp_local_new
,
Richard Henderson
,
00:39
[PATCH v4 20/31] target/arm: Don't use tcg_temp_local_new_*
,
Richard Henderson
,
00:39
[PATCH v4 19/31] target/arm: Drop copies in gen_sve_{ldr,str}
,
Richard Henderson
,
00:39
[PATCH v4 27/31] target/ppc: Don't use tcg_temp_local_new
,
Richard Henderson
,
00:39
[PATCH v4 24/31] target/hppa: Don't use tcg_temp_local_new
,
Richard Henderson
,
00:39
[PATCH v4 29/31] exec/gen-icount: Don't use tcg_temp_local_new_i32
,
Richard Henderson
,
00:39
[PATCH v4 28/31] target/xtensa: Don't use tcg_temp_local_new_*
,
Richard Henderson
,
00:39
[PATCH v4 15/31] accel/tcg/plugin: Use tcg_temp_ebb_*
,
Richard Henderson
,
00:39
[PATCH v4 12/31] tcg: Add tcg_temp_ebb_new_{i32,i64,ptr}
,
Richard Henderson
,
00:38
[PATCH v4 22/31] target/hexagon: Don't use tcg_temp_local_new_*
,
Richard Henderson
,
00:38
[PATCH v4 18/31] tcg: Change default temp lifetime to TEMP_TB
,
Richard Henderson
,
00:38
[PATCH v4 17/31] tcg: Don't re-use TEMP_TB temporaries
,
Richard Henderson
,
00:38
[PATCH v4 13/31] tcg: Use tcg_temp_ebb_new_* in tcg/
,
Richard Henderson
,
00:38
[PATCH v4 16/31] accel/tcg/plugin: Tidy plugin_gen_disable_mem_helpers
,
Richard Henderson
,
00:38
[PATCH v4 14/31] tcg: Use tcg_constant_ptr in do_dup
,
Richard Henderson
,
00:38
[PATCH v4 11/31] tcg: Add tcg_gen_movi_ptr
,
Richard Henderson
,
00:38
[PATCH v4 10/31] tcg: Use tcg_constant_i32 in tcg_gen_io_start
,
Richard Henderson
,
00:38
[PATCH v4 09/31] tcg: Pass TCGTempKind to tcg_temp_new_internal
,
Richard Henderson
,
00:38
[PATCH v4 08/31] tcg: Remove TEMP_NORMAL
,
Richard Henderson
,
00:37
[PATCH v4 07/31] tcg: Add liveness_pass_0
,
Richard Henderson
,
00:37
[PATCH v4 06/31] tcg: Use noinline for major tcg_gen_code subroutines
,
Richard Henderson
,
00:37
[PATCH v4 05/31] tcg: Rename TEMP_LOCAL to TEMP_TB
,
Richard Henderson
,
00:37
[PATCH v4 04/31] tcg: Remove branch-to-next regardless of reference count
,
Richard Henderson
,
00:37
[PATCH v4 03/31] accel/tcg: Use more accurate max_insns for tb_overflow
,
Richard Henderson
,
00:37
[PATCH v4 02/31] accel/tcg: Pass max_insn to gen_intermediate_code by pointer
,
Richard Henderson
,
00:37
[PATCH v4 01/31] tcg: Adjust TCGContext.temps_in_use check
,
Richard Henderson
,
00:37
[PATCH v4 00/31] tcg: Simplify temporary usage
,
Richard Henderson
,
00:37
[PATCH v2 76/76] docs/devel/tcg-ops: Drop recommendation to free temps
,
Richard Henderson
,
00:33
[PATCH v2 75/76] tcg: Create tcg/tcg-temp-internal.h
,
Richard Henderson
,
00:33
[PATCH v2 73/76] include/exec/gen-icount: Drop tcg_temp_free in gen_tb_start
,
Richard Henderson
,
00:33
[PATCH v2 72/76] target/xtensa: Drop tcg_temp_free
,
Richard Henderson
,
00:33
[PATCH v2 66/76] target/sparc: Drop get_temp_i32
,
Richard Henderson
,
00:32
[PATCH v2 74/76] tracing: remove transform.py
,
Richard Henderson
,
00:32
[PATCH v2 70/76] target/tricore: Drop tcg_temp_free
,
Richard Henderson
,
00:32
[PATCH v2 71/76] target/xtensa: Drop reset_sar_tracker
,
Richard Henderson
,
00:32
[PATCH v2 64/76] target/sh4: Drop tcg_temp_free
,
Richard Henderson
,
00:32
[PATCH v2 69/76] target/sparc: Drop tcg_temp_free
,
Richard Henderson
,
00:32
[PATCH v2 68/76] target/sparc: Drop free_compare
,
Richard Henderson
,
00:32
[PATCH v2 67/76] target/sparc: Remove egress label in disas_sparc_context
,
Richard Henderson
,
00:32
[PATCH v2 65/76] target/sparc: Drop get_temp_tl
,
Richard Henderson
,
00:32
[PATCH v2 61/76] target/s390x: Drop tcg_temp_free from translate.c
,
Richard Henderson
,
00:32
[PATCH v2 63/76] target/s390x: Remove g_out, g_out2, g_in1, g_in2 from DisasContext
,
Richard Henderson
,
00:32
[PATCH v2 62/76] target/s390x: Remove assert vs g_in2
,
Richard Henderson
,
00:32
[PATCH v2 60/76] target/s390x: Drop tcg_temp_free from translate_vx.c.inc
,
Richard Henderson
,
00:32
[PATCH v2 59/76] target/s390x: Drop free_compare
,
Richard Henderson
,
00:32
[PATCH v2 58/76] target/s390x: Use tcg_constant_* in translate_vx.c.inc
,
Richard Henderson
,
00:32
[PATCH v2 55/76] target/s390x: Use tcg_constant_* in local contexts
,
Richard Henderson
,
00:31
[PATCH v2 57/76] target/s390x: Use tcg_constant_i32 for fpinst_extract_m34
,
Richard Henderson
,
00:31
[PATCH v2 52/76] target/riscv: Drop temp_new
,
Richard Henderson
,
00:31
[PATCH v2 53/76] target/riscv: Drop tcg_temp_free
,
Richard Henderson
,
00:31
[PATCH v2 50/76] target/ppc: Drop tcg_temp_free
,
Richard Henderson
,
00:31
[PATCH v2 51/76] target/riscv: Drop ftemp_new
,
Richard Henderson
,
00:31
[PATCH v2 46/76] target/mips: Drop tcg_temp_free from vr54xx_translate.c
,
Richard Henderson
,
00:31
[PATCH v2 56/76] target/s390x: Use tcg_constant_* for DisasCompare
,
Richard Henderson
,
00:31
[PATCH v2 45/76] target/mips: Fix trans_mult_acc return
,
Richard Henderson
,
00:31
[PATCH v2 54/76] target/rx: Drop tcg_temp_free
,
Richard Henderson
,
00:31
[PATCH v2 49/76] target/openrisc: Drop tcg_temp_free
,
Richard Henderson
,
00:31
[PATCH v2 47/76] target/mips: Drop tcg_temp_free from translate.c
,
Richard Henderson
,
00:31
[PATCH v2 44/76] target/mips: Drop tcg_temp_free from tx79_translate.c
,
Richard Henderson
,
00:31
[PATCH v2 48/76] target/nios2: Drop tcg_temp_free
,
Richard Henderson
,
00:31
[PATCH v2 42/76] target/mips: Drop tcg_temp_free from octeon_translate.c
,
Richard Henderson
,
00:30
[PATCH v2 43/76] target/mips: Drop tcg_temp_free from translate_addr_const.c
,
Richard Henderson
,
00:30
[PATCH v2 41/76] target/mips: Drop tcg_temp_free from nanomips_translate.c.inc
,
Richard Henderson
,
00:30
[PATCH v2 40/76] target/mips: Drop tcg_temp_free from mxu_translate.c
,
Richard Henderson
,
00:30
[PATCH v2 38/76] target/mips: Drop tcg_temp_free from mips16e_translate.c.inc
,
Richard Henderson
,
00:27
[PATCH v2 37/76] target/mips: Drop tcg_temp_free from micromips_translate.c.inc
,
Richard Henderson
,
00:27
[PATCH v2 34/76] target/m68k: Drop free_cond
,
Richard Henderson
,
00:27
[PATCH v2 36/76] target/microblaze: Drop tcg_temp_free
,
Richard Henderson
,
00:27
[PATCH v2 35/76] target/m68k: Drop tcg_temp_free
,
Richard Henderson
,
00:27
[PATCH v2 39/76] target/mips: Drop tcg_temp_free from msa_translate.c
,
Richard Henderson
,
00:27
[PATCH v2 32/76] target/loongarch: Drop tcg_temp_free
,
Richard Henderson
,
00:27
[PATCH v2 33/76] target/m68k: Drop mark_to_release
,
Richard Henderson
,
00:27
[PATCH v2 31/76] target/loongarch: Drop temp_new
,
Richard Henderson
,
00:26
[PATCH v2 30/76] target/i386: Drop tcg_temp_free
,
Richard Henderson
,
00:26
[PATCH v2 29/76] target/hppa: Drop tcg_temp_free
,
Richard Henderson
,
00:26
[PATCH v2 28/76] target/hexagon/idef-parser: Drop HexValue.is_manual
,
Richard Henderson
,
00:26
[PATCH v2 27/76] target/hexagon/idef-parser: Drop tcg_temp_free
,
Richard Henderson
,
00:26
[PATCH v2 26/76] target/hexagon: Drop tcg_temp_free from gen_tcg_funcs.py
,
Richard Henderson
,
00:26
[PATCH v2 25/76] target/hexagon: Drop tcg_temp_free from C code
,
Richard Henderson
,
00:26
[PATCH v2 21/76] target/cris: Drop cris_alu_free_temps
,
Richard Henderson
,
00:26
[PATCH v2 24/76] target/cris: Drop tcg_temp_free
,
Richard Henderson
,
00:26
[PATCH v2 23/76] target/cris: Drop addr from dec10_ind_move_m_pr
,
Richard Henderson
,
00:26
[PATCH v2 20/76] target/avr: Drop tcg_temp_free
,
Richard Henderson
,
00:26
[PATCH v2 19/76] target/avr: Drop R from trans_COM
,
Richard Henderson
,
00:26
[PATCH v2 22/76] target/cris: Drop cris_alu_m_free_temps
,
Richard Henderson
,
00:26
[PATCH v2 18/76] target/avr: Drop DisasContext.free_skip_var0
,
Richard Henderson
,
00:26
[PATCH v2 14/76] target/arm: Drop tcg_temp_free from translator-sme.c
,
Richard Henderson
,
00:26
[PATCH v2 17/76] target/arm: Drop tcg_temp_free from translator.h
,
Richard Henderson
,
00:26
[PATCH v2 16/76] target/arm: Drop tcg_temp_free from translator-vfp.c
,
Richard Henderson
,
00:26
[PATCH v2 15/76] target/arm: Drop tcg_temp_free from translator-sve.c
,
Richard Henderson
,
00:26
[PATCH v2 12/76] target/arm: Drop tcg_temp_free from translator-mve.c
,
Richard Henderson
,
00:26
[PATCH v2 10/76] target/arm: Drop tcg_temp_free from translator-a64.c
,
Richard Henderson
,
00:25
[PATCH v2 08/76] target/arm: Drop new_tmp_a64
,
Richard Henderson
,
00:25
[PATCH v2 13/76] target/arm: Drop tcg_temp_free from translator-neon.c
,
Richard Henderson
,
00:25
[PATCH v2 06/76] target/arm: Drop tcg_temp_free from translator.c
,
Richard Henderson
,
00:25
[PATCH v2 11/76] target/arm: Drop tcg_temp_free from translator-m-nocp.c
,
Richard Henderson
,
00:25
[PATCH v2 05/76] target/arm: Remove value_global from DisasCompare
,
Richard Henderson
,
00:25
[PATCH v2 09/76] target/arm: Drop new_tmp_a64_zero
,
Richard Henderson
,
00:25
[PATCH v2 07/76] target/arm: Drop DisasContext.tmp_a64
,
Richard Henderson
,
00:25
[PATCH v2 03/76] target/alpha: Drop tcg_temp_free
,
Richard Henderson
,
00:25
[PATCH v2 01/76] tcg: Remove tcg_check_temp_count, tcg_clear_temp_count
,
Richard Henderson
,
00:25
[PATCH v2 04/76] target/arm: Remove arm_free_cc, a64_free_cc
,
Richard Henderson
,
00:25
[PATCH v2 02/76] accel/tcg: Remove translator_loop_temp_check
,
Richard Henderson
,
00:25
[PATCH v2 00/76] tcg: Drop tcg_temp_free from translators
,
Richard Henderson
,
00:25
February 26, 2023
[PATCH] hw/riscv: Fix the bug of maximum size limit when put initrd to RAM
,
Hang Xu
,
23:46
Re: [PATCH 32/76] target/loongarch: Drop tcg_temp_free
,
gaosong
,
22:18
Re: [PATCH 31/76] target/loongarch: Drop temp_new
,
gaosong
,
22:17
Re: [PATCH 1/2] gitlab/opensbi: Move to docker:stable
,
Bin Meng
,
22:11
Re: [PATCH] hw/riscv: Skip re-generating DT nodes for a given DTB
,
Bin Meng
,
22:09
Re: [PATCH 74/76] tracing: remove transform.py
,
gaosong
,
22:03
Re: [PATCH 2/2] target/riscv/vector_helper.c: avoid env_archcpu() when reading RISCVCPUConfig
,
liweiwei
,
19:59
Re: [PATCH 2/2] target/riscv/vector_helper.c: avoid env_archcpu() when reading RISCVCPUConfig
,
Philippe Mathieu-Daudé
,
13:24
Re: [PATCH 1/2] target/riscv/vector_helper.c: create vext_set_tail_elems_1s()
,
Philippe Mathieu-Daudé
,
13:23
Re: [PATCH] target/riscv/vector_helper.c: create vext_set_tail_elems_1s()
,
Daniel Henrique Barboza
,
12:40
Re: [PATCH 0/4] RISCVCPUConfig related cleanups
,
Daniel Henrique Barboza
,
12:39
[PATCH 2/2] target/riscv/vector_helper.c: avoid env_archcpu() when reading RISCVCPUConfig
,
Daniel Henrique Barboza
,
12:05
[PATCH 1/2] target/riscv/vector_helper.c: create vext_set_tail_elems_1s()
,
Daniel Henrique Barboza
,
12:05
[PATCH 0/2] target/riscv: some vector_helper.c cleanups
,
Daniel Henrique Barboza
,
12:05
Re: [PATCH 53/76] target/riscv: Drop tcg_temp_free
,
liweiwei
,
08:04
Re: [PATCH 51/76] target/riscv: Drop ftemp_new
,
liweiwei
,
08:02
Re: [PATCH 52/76] target/riscv: Drop temp_new
,
liweiwei
,
08:01
Re: [PATCH 51/76] target/riscv: Drop ftemp_new
,
liweiwei
,
07:58
February 25, 2023
Re: [PATCH 45/76] target/mips: Fix trans_mult_acc return
,
Philippe Mathieu-Daudé
,
14:47
Re: [PATCH 74/76] tracing: remove transform.py
,
Richard Henderson
,
13:38
Re: [PATCH 76/76] docs/devel/tcg-ops: Drop recommendation to free temps
,
Daniel Henrique Barboza
,
05:55
Re: [PATCH 74/76] tracing: remove transform.py
,
Daniel Henrique Barboza
,
05:53
Re: [PATCH 50/76] target/ppc: Drop tcg_temp_free
,
Daniel Henrique Barboza
,
05:52
Re: [PATCH 74/76] tracing: remove transform.py
,
Daniel Henrique Barboza
,
05:52
Re: [PATCH 53/76] target/riscv: Drop tcg_temp_free
,
Daniel Henrique Barboza
,
05:34
Re: [PATCH 52/76] target/riscv: Drop temp_new
,
Daniel Henrique Barboza
,
05:33
Re: [PATCH 51/76] target/riscv: Drop ftemp_new
,
Daniel Henrique Barboza
,
05:33
Re: [PATCH 74/76] tracing: remove transform.py
,
Daniel Henrique Barboza
,
05:22
Re: [PATCH 00/76] tcg: Drop tcg_temp_free from translators
,
Philippe Mathieu-Daudé
,
05:11
Re: [PATCH 00/76] tcg: Drop tcg_temp_free from translators
,
Philippe Mathieu-Daudé
,
05:10
Re: [PATCH 72/76] target/xtensa: Drop tcg_temp_free
,
Max Filippov
,
04:42
Re: [PATCH 71/76] target/sparc: Drop reset_sar_tracker
,
Max Filippov
,
04:39
[PATCH 75/76] tcg: Create tcg/tcg-temp-internal.h
,
Richard Henderson
,
04:21
[PATCH 73/76] include/exec/gen-icount: Drop tcg_temp_free in gen_tb_start
,
Richard Henderson
,
04:21
[PATCH 68/76] target/sparc: Drop free_compare
,
Richard Henderson
,
04:21
[PATCH 69/76] target/sparc: Drop tcg_temp_free
,
Richard Henderson
,
04:21
[PATCH 74/76] tracing: remove transform.py
,
Richard Henderson
,
04:21
[PATCH 71/76] target/sparc: Drop reset_sar_tracker
,
Richard Henderson
,
04:21
[PATCH 67/76] target/sparc: Remove egress label in disas_sparc_context
,
Richard Henderson
,
04:21
[PATCH 59/76] target/s390x: Drop free_compare
,
Richard Henderson
,
04:21
[PATCH 66/76] target/sparc: Drop get_temp_i32
,
Richard Henderson
,
04:21
[PATCH 65/76] target/sparc: Drop get_temp_tl
,
Richard Henderson
,
04:21
[PATCH 63/76] target/s390x: Remove g_out, g_out2, g_in1, g_in2 from DisasContext
,
Richard Henderson
,
04:21
[PATCH 76/76] docs/devel/tcg-ops: Drop recommendation to free temps
,
Richard Henderson
,
04:21
[PATCH 72/76] target/xtensa: Drop tcg_temp_free
,
Richard Henderson
,
04:21
[PATCH 60/76] target/s390x: Drop tcg_temp_free from translate_vx.c.inc
,
Richard Henderson
,
04:21
[PATCH 70/76] target/tricore: Drop tcg_temp_free
,
Richard Henderson
,
04:21
[PATCH 55/76] target/s390x: Use tcg_constant_* in local contexts
,
Richard Henderson
,
04:21
[PATCH 64/76] target/sh4: Drop tcg_temp_free
,
Richard Henderson
,
04:21
[PATCH 61/76] target/s390x: Drop tcg_temp_free from translate.c
,
Richard Henderson
,
04:21
[PATCH 58/76] target/s390x: Use tcg_constant_* in translate_vx.c.inc
,
Richard Henderson
,
04:21
[PATCH 62/76] target/s390x: Remove assert vs g_in2
,
Richard Henderson
,
04:20
[PATCH 51/76] target/riscv: Drop ftemp_new
,
Richard Henderson
,
04:20
[PATCH 56/76] target/s390x: Use tcg_constant_* for DisasCompare
,
Richard Henderson
,
04:20
[PATCH 54/76] target/rx: Drop tcg_temp_free
,
Richard Henderson
,
04:20
[PATCH 57/76] target/s390x: Use tcg_constant_i32 for fpinst_extract_m34
,
Richard Henderson
,
04:20
[PATCH 53/76] target/riscv: Drop tcg_temp_free
,
Richard Henderson
,
04:20
[PATCH 50/76] target/ppc: Drop tcg_temp_free
,
Richard Henderson
,
04:20
[PATCH 52/76] target/riscv: Drop temp_new
,
Richard Henderson
,
04:20
[PATCH 49/76] target/openrisc: Drop tcg_temp_free
,
Richard Henderson
,
04:20
[PATCH 48/76] target/nios2: Drop tcg_temp_free
,
Richard Henderson
,
04:20
[PATCH 47/76] target/mips: Drop tcg_temp_free from translate.c
,
Richard Henderson
,
04:20
[PATCH 45/76] target/mips: Fix trans_mult_acc return
,
Richard Henderson
,
04:20
[PATCH 46/76] target/mips: Drop tcg_temp_free from vr54xx_translate.c
,
Richard Henderson
,
04:20
[PATCH 44/76] target/mips: Drop tcg_temp_free from tx79_translate.c
,
Richard Henderson
,
04:19
[PATCH 43/76] target/mips: Drop tcg_temp_free from translate_addr_const.c
,
Richard Henderson
,
04:19
[PATCH 41/76] target/mips: Drop tcg_temp_free from nanomips_translate.c.inc
,
Richard Henderson
,
04:19
[PATCH 42/76] target/mips: Drop tcg_temp_free from octeon_translate.c
,
Richard Henderson
,
04:19
[PATCH 40/76] target/mips: Drop tcg_temp_free from mxu_translate.c
,
Richard Henderson
,
04:19
Re: [PATCH 26/76] target/cris: Drop tcg_temp_free from gen_tcg_funcs.py
,
Richard Henderson
,
04:18
Re: [PATCH 25/76] target/cris: Drop tcg_temp_free from C code
,
Richard Henderson
,
04:17
[PATCH 39/76] target/mips: Drop tcg_temp_free from msa_translate.c
,
Richard Henderson
,
04:17
[PATCH 38/76] target/mips: Drop tcg_temp_free from mips16e_translate.c.inc
,
Richard Henderson
,
04:17
[PATCH 37/76] target/mips: Drop tcg_temp_free from micromips_translate.c.inc
,
Richard Henderson
,
04:17
[PATCH 36/76] target/microblaze: Drop tcg_temp_free
,
Richard Henderson
,
04:17
[PATCH 35/76] target/m68k: Drop tcg_temp_free
,
Richard Henderson
,
04:17
[PATCH 34/76] target/m68k: Drop free_cond
,
Richard Henderson
,
04:17
[PATCH 33/76] target/m68k: Drop mark_to_release
,
Richard Henderson
,
04:16
[PATCH 32/76] target/loongarch: Drop tcg_temp_free
,
Richard Henderson
,
04:16
[PATCH 29/76] target/hppa: Drop tcg_temp_free
,
Richard Henderson
,
04:16
[PATCH 26/76] target/cris: Drop tcg_temp_free from gen_tcg_funcs.py
,
Richard Henderson
,
04:16
[PATCH 25/76] target/cris: Drop tcg_temp_free from C code
,
Richard Henderson
,
04:16
[PATCH 30/76] target/i386: Drop tcg_temp_free
,
Richard Henderson
,
04:16
[PATCH 31/76] target/loongarch: Drop temp_new
,
Richard Henderson
,
04:16
[PATCH 27/76] target/hexagon/idef-parser: Drop tcg_temp_free
,
Richard Henderson
,
04:15
[PATCH 28/76] target/hexagon/idef-parser: Drop HexValue.is_manual
,
Richard Henderson
,
04:15
[PATCH 24/76] target/cris: Drop tcg_temp_free
,
Richard Henderson
,
04:15
[PATCH 23/76] target/cris: Drop addr from dec10_ind_move_m_pr
,
Richard Henderson
,
04:15
[PATCH 22/76] target/cris: Drop cris_alu_m_free_temps
,
Richard Henderson
,
04:15
[PATCH 21/76] target/cris: Drop cris_alu_free_temps
,
Richard Henderson
,
04:15
[PATCH 20/76] target/avr: Drop tcg_temp_free
,
Richard Henderson
,
04:15
[PATCH 19/76] target/avr: Drop R from trans_COM
,
Richard Henderson
,
04:15
[PATCH 18/76] target/avr: Drop DisasContext.free_skip_var0
,
Richard Henderson
,
04:15
[PATCH 17/76] target/arm: Drop tcg_temp_free from translator.h
,
Richard Henderson
,
04:15
[PATCH 16/76] target/arm: Drop tcg_temp_free from translator-vfp.c
,
Richard Henderson
,
04:15
[PATCH 15/76] target/arm: Drop tcg_temp_free from translator-sve.c
,
Richard Henderson
,
04:15
[PATCH 14/76] target/arm: Drop tcg_temp_free from translator-sme.c
,
Richard Henderson
,
04:15
[PATCH 13/76] target/arm: Drop tcg_temp_free from translator-neon.c
,
Richard Henderson
,
04:15
[PATCH 12/76] target/arm: Drop tcg_temp_free from translator-mve.c
,
Richard Henderson
,
04:15
[PATCH 10/76] target/arm: Drop tcg_temp_free from translator-a64.c
,
Richard Henderson
,
04:15
[PATCH 11/76] target/arm: Drop tcg_temp_free from translator-m-nocp.c
,
Richard Henderson
,
04:15
[PATCH 09/76] target/arm: Drop new_tmp_a64_zero
,
Richard Henderson
,
04:15
[PATCH 08/76] target/arm: Drop new_tmp_a64
,
Richard Henderson
,
04:15
[PATCH 07/76] target/arm: Drop DisasContext.tmp_a64
,
Richard Henderson
,
04:14
[PATCH 06/76] target/arm: Drop tcg_temp_free from translator.c
,
Richard Henderson
,
04:14
[PATCH 05/76] target/arm: Remove value_global from DisasCompare
,
Richard Henderson
,
04:14
[PATCH 04/76] target/arm: Remove arm_free_cc, a64_free_cc
,
Richard Henderson
,
04:14
[PATCH 02/76] accel/tcg: Remove translator_loop_temp_check
,
Richard Henderson
,
04:14
[PATCH 03/76] target/alpha: Drop tcg_temp_free
,
Richard Henderson
,
04:14
[PATCH 01/76] tcg: Remove tcg_check_temp_count, tcg_clear_temp_count
,
Richard Henderson
,
04:14
[PATCH 00/76] tcg: Drop tcg_temp_free from translators
,
Richard Henderson
,
04:14
Re: [PATCH v8 2/4] target/riscv: implement Zicboz extension
,
liweiwei
,
01:48
Re: [PATCH 0/4] RISCVCPUConfig related cleanups
,
liweiwei
,
01:47
Re: [PATCH 4/4] target/riscv/csr.c: avoid env_archcpu() usages when reading RISCVCPUConfig
,
liweiwei
,
01:45
Re: [PATCH 3/4] target/riscv/csr.c: use riscv_cpu_cfg() to avoid env_cpu() pointers
,
liweiwei
,
01:43
Re: [PATCH 2/4] target/riscv/csr.c: simplify mctr()
,
liweiwei
,
01:42
Re: [PATCH 1/4] target/riscv/csr.c: use env_archcpu() in ctr()
,
liweiwei
,
01:41
[PATCH v3 3/3] hw/riscv: Validate cluster and NUMA node boundary
,
Gavin Shan
,
01:37
[PATCH v3 2/3] hw/arm: Validate cluster and NUMA node boundary
,
Gavin Shan
,
01:37
[PATCH v3 1/3] numa: Validate cluster and NUMA node boundary if required
,
Gavin Shan
,
01:37
[PATCH v3 0/3] NUMA: Apply cluster-NUMA-node boundary for aarch64 and riscv machines
,
Gavin Shan
,
01:37
February 24, 2023
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Gavin Shan
,
19:06
Re: [PATCH 0/4] RISCVCPUConfig related cleanups
,
Richard Henderson
,
16:36
Re: [PATCH 0/4] RISCVCPUConfig related cleanups
,
Richard Henderson
,
16:34
[PATCH 2/2] roms/opensbi: Upgrade from v1.1 to v1.2
,
Palmer Dabbelt
,
16:27
[PATCH 1/2] gitlab/opensbi: Move to docker:stable
,
Palmer Dabbelt
,
16:26
[PATCH 0/2] Fix the OpenSBI CI job and bump to v1.2
,
Palmer Dabbelt
,
16:26
Re: [PULL 0/9] Fourth RISC-V PR for QEMU 8.0
,
Palmer Dabbelt
,
14:01
[PULL 8/8] target/riscv: Fix vslide1up.vf and vslide1down.vf
,
Palmer Dabbelt
,
14:01
[PULL 2/8] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
,
Palmer Dabbelt
,
14:01
[PULL 4/8] target/riscv: Remove privileged spec version restriction for RVV
,
Palmer Dabbelt
,
14:01
[PULL 7/8] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
,
Palmer Dabbelt
,
14:01
[PULL 1/8] hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()
,
Palmer Dabbelt
,
14:01
[PULL 6/8] target/riscv: Smepmp: Skip applying default rules when address matches
,
Palmer Dabbelt
,
14:01
[PULL 3/8] hw/riscv/boot.c: make riscv_load_initrd() static
,
Palmer Dabbelt
,
14:01
[PULL] Fourth RISC-V PR for QEMU 8.0, Attempt 2
,
Palmer Dabbelt
,
14:01
[PULL 5/8] MAINTAINERS: Add some RISC-V reviewers
,
Palmer Dabbelt
,
14:01
Re: [PULL 0/9] Fourth RISC-V PR for QEMU 8.0
,
Peter Maydell
,
13:52
[PATCH 4/4] target/riscv/csr.c: avoid env_archcpu() usages when reading RISCVCPUConfig
,
Daniel Henrique Barboza
,
12:45
[PATCH 3/4] target/riscv/csr.c: use riscv_cpu_cfg() to avoid env_cpu() pointers
,
Daniel Henrique Barboza
,
12:45
[PATCH 2/4] target/riscv/csr.c: simplify mctr()
,
Daniel Henrique Barboza
,
12:45
[PATCH 1/4] target/riscv/csr.c: use env_archcpu() in ctr()
,
Daniel Henrique Barboza
,
12:45
[PATCH 0/4] RISCVCPUConfig related cleanups
,
Daniel Henrique Barboza
,
12:45
Re: [PATCH 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Igor Mammedov
,
11:14
Re: [PATCH V4 5/8] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Sunil V L
,
09:27
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Igor Mammedov
,
09:20
[PATCH v8 4/4] target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder
,
Daniel Henrique Barboza
,
08:26
[PATCH v8 3/4] target/riscv: implement Zicbom extension
,
Daniel Henrique Barboza
,
08:26
[PATCH v8 2/4] target/riscv: implement Zicboz extension
,
Daniel Henrique Barboza
,
08:26
[PATCH v8 1/4] tcg: add 'size' param to probe_access_flags()
,
Daniel Henrique Barboza
,
08:26
[PATCH v8 0/4] riscv: Add support for Zicbo[m,z,p] instructions
,
Daniel Henrique Barboza
,
08:25
Re: [PATCH V4 6/8] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table
,
Igor Mammedov
,
07:55
Re: [PATCH V4 5/8] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Igor Mammedov
,
07:53
Re: [PATCH 2/6] target/riscv: Fix the relationship of PBMTE/STCE fields between menvcfg and henvcfg
,
liweiwei
,
07:36
Re: [PATCH 2/6] target/riscv: Fix the relationship of PBMTE/STCE fields between menvcfg and henvcfg
,
Andrew Jones
,
07:19
Re: [PATCH 6/6] target/riscv: Export Svadu property
,
Daniel Henrique Barboza
,
06:56
Re: [PATCH 5/6] target/riscv: Add *envcfg.HADE related check in address translation
,
Daniel Henrique Barboza
,
06:53
Re: [PATCH 4/6] target/riscv: Add *envcfg.PBMTE related check in address translation
,
Daniel Henrique Barboza
,
06:52
Re: [PATCH 3/6] target/riscv: Add csr support for svadu
,
Daniel Henrique Barboza
,
06:47
Re: [PATCH 2/6] target/riscv: Fix the relationship of PBMTE/STCE fields between menvcfg and henvcfg
,
Daniel Henrique Barboza
,
06:44
Re: [PATCH 1/6] target/riscv: Fix the relationship between menvcfg.PBMTE/STCE and Svpbmt/Sstc extensions
,
Daniel Henrique Barboza
,
06:41
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Andrew Jones
,
05:39
Re: [PATCH V4 8/8] MAINTAINERS: Add entry for RISC-V ACPI
,
Andrew Jones
,
05:30
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Gavin Shan
,
05:17
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Daniel Henrique Barboza
,
04:27
Re: [PATCH v7 1/4] tcg: add 'size' param to probe_access_flags()
,
Daniel Henrique Barboza
,
04:20
[PATCH V4 8/8] MAINTAINERS: Add entry for RISC-V ACPI
,
Sunil V L
,
03:37
[PATCH V4 7/8] hw/riscv/virt.c: Initialize the ACPI tables
,
Sunil V L
,
03:37
[PATCH V4 6/8] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table
,
Sunil V L
,
03:37
[PATCH V4 5/8] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Sunil V L
,
03:37
[PATCH V4 4/8] hw/riscv/virt: Enable basic ACPI infrastructure
,
Sunil V L
,
03:37
[PATCH V4 3/8] hw/riscv/virt: Add memmap pointer to RiscVVirtState
,
Sunil V L
,
03:37
[PATCH V4 2/8] hw/riscv/virt: Add a switch to disable ACPI
,
Sunil V L
,
03:37
[PATCH V4 1/8] hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
,
Sunil V L
,
03:37
[PATCH V4 0/8] Add basic ACPI support for risc-v virt
,
Sunil V L
,
03:37
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Gavin Shan
,
02:20
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Gavin Shan
,
02:09
Re: [PULL 0/9] Fourth RISC-V PR for QEMU 8.0
,
Thomas Huth
,
01:56
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Gavin Shan
,
00:50
February 23, 2023
[PATCH 4/6] target/riscv: Add *envcfg.PBMTE related check in address translation
,
Weiwei Li
,
23:09
[PATCH 5/6] target/riscv: Add *envcfg.HADE related check in address translation
,
Weiwei Li
,
23:09
[PATCH 2/6] target/riscv: Fix the relationship of PBMTE/STCE fields between menvcfg and henvcfg
,
Weiwei Li
,
23:09
[PATCH 3/6] target/riscv: Add csr support for svadu
,
Weiwei Li
,
23:09
[PATCH 6/6] target/riscv: Export Svadu property
,
Weiwei Li
,
23:09
[PATCH 1/6] target/riscv: Fix the relationship between menvcfg.PBMTE/STCE and Svpbmt/Sstc extensions
,
Weiwei Li
,
23:09
[PATCH 0/6] target/riscv: Add support for Svadu extension
,
Weiwei Li
,
23:09
Re: [PATCH v7 4/4] target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder
,
liweiwei
,
21:04
Re: [PATCH v7 3/4] target/riscv: implement Zicbom extension
,
liweiwei
,
21:02
Re: [PATCH v7 2/4] target/riscv: implement Zicboz extension
,
liweiwei
,
20:49
Re: [PATCH v7 1/4] tcg: add 'size' param to probe_access_flags()
,
Richard Henderson
,
19:23
Re: [PATCH v7 1/4] tcg: add 'size' param to probe_access_flags()
,
Richard Henderson
,
19:19
Re: [PATCH v7 1/4] tcg: add 'size' param to probe_access_flags()
,
Richard Henderson
,
19:11
Re: [PATCH v7 3/4] target/riscv: implement Zicbom extension
,
Richard Henderson
,
19:07
Re: [PATCH v7 2/4] target/riscv: implement Zicboz extension
,
Richard Henderson
,
19:07
Re: [PATCH v7 1/4] tcg: add 'size' param to probe_access_flags()
,
Richard Henderson
,
19:06
[PATCH v7 4/4] target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder
,
Daniel Henrique Barboza
,
18:44
[PATCH v7 3/4] target/riscv: implement Zicbom extension
,
Daniel Henrique Barboza
,
18:44
[PATCH v7 2/4] target/riscv: implement Zicboz extension
,
Daniel Henrique Barboza
,
18:44
[PATCH v7 1/4] tcg: add 'size' param to probe_access_flags()
,
Daniel Henrique Barboza
,
18:44
[PATCH v7 0/4] riscv: Add support for Zicbo[m,z,p] instructions
,
Daniel Henrique Barboza
,
18:44
Re: [PULL 0/9] Fourth RISC-V PR for QEMU 8.0
,
Palmer Dabbelt
,
17:49
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Daniel Henrique Barboza
,
08:19
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Daniel P . Berrangé
,
07:57
Re: [PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Andrew Jones
,
07:25
Re: [PATCH v2 2/4] numa: Validate socket and NUMA node boundary if required
,
Gavin Shan
,
05:27
Re: [PATCH] target/riscv: Add support for Zicond extension
,
Frank Chang
,
05:10
Re: [PATCH] target/riscv/vector_helper.c: create vext_set_tail_elems_1s()
,
Frank Chang
,
04:59
Re: [PATCH v2 2/4] numa: Validate socket and NUMA node boundary if required
,
Philippe Mathieu-Daudé
,
04:06
[PATCH v2 4/4] hw/riscv: Validate socket and NUMA node boundary
,
Gavin Shan
,
03:15
[PATCH v2 3/4] hw/arm: Validate socket and NUMA node boundary
,
Gavin Shan
,
03:14
[PATCH v2 2/4] numa: Validate socket and NUMA node boundary if required
,
Gavin Shan
,
03:14
[PATCH v2 1/4] qtest/numa-test: Follow socket-NUMA-node boundary for aarch64
,
Gavin Shan
,
03:14
[PATCH v2 0/4] NUMA: Apply socket-NUMA-node boundary for aarch64 and RiscV machines
,
Gavin Shan
,
03:14
Re: [PATCH v7 03/10] target/riscv: allow MISA writes as experimental
,
Andrew Jones
,
01:17
February 22, 2023
Re: [PATCH v7 03/10] target/riscv: allow MISA writes as experimental
,
liweiwei
,
21:36
[PATCH v7 10/10] target/riscv/cpu: remove CPUArchState::features and friends
,
Daniel Henrique Barboza
,
13:52
[PATCH v7 09/10] target/riscv: remove RISCV_FEATURE_MMU
,
Daniel Henrique Barboza
,
13:52
[PATCH v7 08/10] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
,
Daniel Henrique Barboza
,
13:52
[PATCH v7 07/10] target/riscv: remove RISCV_FEATURE_PMP
,
Daniel Henrique Barboza
,
13:52
[PATCH v7 06/10] target/riscv: remove RISCV_FEATURE_EPMP
,
Daniel Henrique Barboza
,
13:52
[PATCH v7 05/10] target/riscv/cpu.c: error out if EPMP is enabled without PMP
,
Daniel Henrique Barboza
,
13:52
[PATCH v7 04/10] target/riscv: remove RISCV_FEATURE_DEBUG
,
Daniel Henrique Barboza
,
13:52
[PATCH v7 03/10] target/riscv: allow MISA writes as experimental
,
Daniel Henrique Barboza
,
13:52
[PATCH v7 02/10] target/riscv: do not mask unsupported QEMU extensions in write_misa()
,
Daniel Henrique Barboza
,
13:52
[PATCH v7 01/10] target/riscv: introduce riscv_cpu_cfg()
,
Daniel Henrique Barboza
,
13:52
[PATCH v7 00/10] make write_misa a no-op and FEATURE_* cleanups
,
Daniel Henrique Barboza
,
13:52
Re: [PATCH v6 2/4] target/riscv: implement Zicboz extension
,
Richard Henderson
,
13:00
Re: [PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op
,
Daniel Henrique Barboza
,
11:48
Re: [PULL 0/9] Fourth RISC-V PR for QEMU 8.0
,
Palmer Dabbelt
,
10:56
[PATCH] gitlab-ci.yml: opensbi: Move to Ubuntu 22.04
,
Palmer Dabbelt
,
10:56
Re: [PATCH v6 2/4] target/riscv: implement Zicboz extension
,
Daniel Henrique Barboza
,
04:37
Re: [PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op
,
LIU Zhiwei
,
04:21
Re: [PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op
,
Daniel Henrique Barboza
,
03:41
February 21, 2023
Re: [PATCH] target/riscv/vector_helper.c: create vext_set_tail_elems_1s()
,
liweiwei
,
21:01
[PATCH v3 19/24] gdbstub: move register helpers into standalone include
,
Alex Bennée
,
18:02
[PATCH v3 20/24] gdbstub: move syscall handling to new file
,
Alex Bennée
,
18:02
[PATCH v3 18/24] gdbstub: don't use target_ulong while handling registers
,
Alex Bennée
,
18:02
[PATCH v3 17/24] gdbstub: fix address type of gdb_set_cpu_pc
,
Alex Bennée
,
18:02
[PATCH v3 21/24] gdbstub: only compile gdbstub twice for whole build
,
Alex Bennée
,
18:02
[PATCH v3 16/24] gdbstub: specialise stub_can_reverse
,
Alex Bennée
,
18:02
[PATCH v3 22/24] testing: probe gdb for supported architectures ahead of time
,
Alex Bennée
,
18:02
[PATCH v3 14/24] gdbstub: specialise target_memory_rw_debug
,
Alex Bennée
,
18:02
[PATCH v3 12/24] gdbstub: abstract target specific details from gdb_put_packet_binary
,
Alex Bennée
,
18:02
[PATCH v3 13/24] gdbstub: specialise handle_query_attached
,
Alex Bennée
,
17:53
[PATCH v3 24/24] gdbstub: split out softmmu/user specifics for syscall handling
,
Alex Bennée
,
17:53
[PATCH v3 15/24] gdbstub: introduce gdb_get_max_cpus
,
Alex Bennée
,
17:53
[PATCH v3 10/24] gdbstub: move chunks of user code into own files
,
Alex Bennée
,
17:53
[PATCH v3 09/24] gdbstub: move chunk of softmmu functionality to own file
,
Alex Bennée
,
17:53
[PATCH v3 23/24] include: split target_long definition from cpu-defs
,
Alex Bennée
,
17:53
[PATCH v3 11/24] gdbstub: rationalise signal mapping in softmmu
,
Alex Bennée
,
17:52
[PATCH v3 08/24] gdbstub: make various helpers visible to the rest of the module
,
Alex Bennée
,
17:52
[PATCH v3 07/24] gdbstub: move fromhex/tohex routines to internals
,
Alex Bennée
,
17:52
[PATCH v3 06/24] includes: move tb_flush into its own header
,
Alex Bennée
,
17:52
[PATCH v3 03/24] gdbstub: Make syscall_complete/[gs]et_reg target-agnostic typedefs
,
Alex Bennée
,
17:52
[PATCH v3 04/24] gdbstub: define separate user/system structures
,
Alex Bennée
,
17:52
[PATCH v3 05/24] gdbstub: move GDBState to shared internals header
,
Alex Bennée
,
17:52
[PATCH v3 02/24] gdbstub: fix-up copyright and license files
,
Alex Bennée
,
17:52
[PATCH v3 00/24] gdbstub: re-organise to for better compilation behaviour
,
Alex Bennée
,
17:52
[PATCH v3 01/24] gdbstub/internals.h: clean up include guard
,
Alex Bennée
,
17:52
[PATCH] target/riscv/vector_helper.c: create vext_set_tail_elems_1s()
,
Daniel Henrique Barboza
,
13:46
Re: [PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op
,
Andrew Jones
,
13:29
Re: [PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op
,
Daniel Henrique Barboza
,
13:23
Re: [PATCH 3/5] hw/cpu/cluster: Restrict CPU cluster to a particular CPU type
,
Peter Maydell
,
12:59
Re: [PATCH 2/5] hw/cpu/cluster: Only add CPU objects to CPU cluster
,
Peter Maydell
,
12:56
Re: [PATCH 1/5] hw/cpu: Extend CPUState::cluster_index documentation
,
Peter Maydell
,
12:47
Re: [PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op
,
Andrew Jones
,
12:06
Re: [PULL 0/9] Fourth RISC-V PR for QEMU 8.0
,
Peter Maydell
,
11:44
Re: [PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op
,
Daniel Henrique Barboza
,
10:49
Re: [PATCH] hw/riscv: Skip re-generating DT nodes for a given DTB
,
Daniel Henrique Barboza
,
06:31
[PATCH] target/riscv: Add support for Zicond extension
,
Weiwei Li
,
04:10
Re: [PATCH v11 0/9] support subsets of code size reduction extension
,
liweiwei
,
02:15
[PATCH] hw/riscv: Skip re-generating DT nodes for a given DTB
,
Bin Meng
,
01:20
February 20, 2023
Re: [PATCH V3 4/8] hw/riscv/virt: Enable basic ACPI infrastructure
,
Sunil V L
,
13:45
[PATCH] MAINTAINERS: Add section for overall sensors
,
Philippe Mathieu-Daudé
,
06:02
Re: [PATCH] RISC-V: XTheadMemPair: Remove register restrictions for store-pair
,
LIU Zhiwei
,
05:56
[PATCH] RISC-V: XTheadMemPair: Remove register restrictions for store-pair
,
Christoph Muellner
,
04:56
February 18, 2023
Re: [PATCH v6 2/4] target/riscv: implement Zicboz extension
,
Richard Henderson
,
14:35
Re: [PATCH v6 2/4] target/riscv: implement Zicboz extension
,
weiwei
,
08:21
Re: [PATCH] [PATCH] disas/riscv Fix ctzw disassemble
,
weiwei
,
07:41
Re: [PATCH v5 3/4] target/riscv: implement Zicbom extension
,
Daniel Henrique Barboza
,
04:51
Re: [PATCH v6 2/4] target/riscv: implement Zicboz extension
,
Daniel Henrique Barboza
,
04:28
February 17, 2023
Re: [PATCH v6 3/4] target/riscv: implement Zicbom extension
,
Richard Henderson
,
22:46
Re: [PATCH v6 2/4] target/riscv: implement Zicboz extension
,
Richard Henderson
,
22:45
[PATCH v6 4/4] target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder
,
Daniel Henrique Barboza
,
15:35
[PATCH v6 3/4] target/riscv: implement Zicbom extension
,
Daniel Henrique Barboza
,
15:35
[PATCH v6 2/4] target/riscv: implement Zicboz extension
,
Daniel Henrique Barboza
,
15:35
[PATCH v6 1/4] accel/tcg: Add probe_access_range_flags interface
,
Daniel Henrique Barboza
,
15:35
[PATCH v6 0/4] riscv: Add support for Zicbo[m,z,p] instructions
,
Daniel Henrique Barboza
,
15:34
[PULL 9/9] target/riscv: Fix vslide1up.vf and vslide1down.vf
,
Palmer Dabbelt
,
12:53
[PULL 4/9] roms/opensbi: Upgrade from v1.1 to v1.2
,
Palmer Dabbelt
,
12:53
[PULL 8/9] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
,
Palmer Dabbelt
,
12:53
[PULL 7/9] target/riscv: Smepmp: Skip applying default rules when address matches
,
Palmer Dabbelt
,
12:53
[PULL 6/9] MAINTAINERS: Add some RISC-V reviewers
,
Palmer Dabbelt
,
12:53
[PULL 5/9] target/riscv: Remove privileged spec version restriction for RVV
,
Palmer Dabbelt
,
12:53
[PULL 3/9] hw/riscv/boot.c: make riscv_load_initrd() static
,
Palmer Dabbelt
,
12:53
[PULL 1/9] hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()
,
Palmer Dabbelt
,
12:53
[PULL 2/9] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
,
Palmer Dabbelt
,
12:53
[PULL 0/9] Fourth RISC-V PR for QEMU 8.0
,
Palmer Dabbelt
,
12:53
Re: [PATCH] [PATCH] disas/riscv Fix ctzw disassemble
,
Daniel Henrique Barboza
,
12:52
Re: [PATCH 18/18] target/riscv: Move configuration check to envcfg CSRs predicate()
,
Palmer Dabbelt
,
12:28
[PATCH] [PATCH] disas/riscv Fix ctzw disassemble
,
Ivan Klokov
,
11:11
[PATCH] [PATCH] disas/riscv Fix ctzw disassemble
,
Ivan Klokov
,
10:56
Re: [PATCH] [PATCH] disas/riscv Fix ctzw disassemble
,
Daniel Henrique Barboza
,
10:45
Re: [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
,
Daniel Henrique Barboza
,
03:39
Re: [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
,
Richard Henderson
,
00:41
February 16, 2023
Re: [PATCH 13/18] target/riscv: Allow debugger to access seed CSR
,
LIU Zhiwei
,
21:59
Re: [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
,
LIU Zhiwei
,
21:55
Re: [PATCH 12/18] target/riscv: Allow debugger to access user timer and counter CSRs
,
LIU Zhiwei
,
21:48
Re: [PATCH 11/18] target/riscv: gdbstub: Drop the vector CSRs in riscv-vector.xml
,
LIU Zhiwei
,
21:43
Re: [PATCH 10/18] target/riscv: gdbstub: Turn on debugger mode before calling CSR predicate()
,
LIU Zhiwei
,
21:39
Re: [PATCH 09/18] target/riscv: Avoid reporting odd-numbered pmpcfgX in the CSR XML for RV64
,
LIU Zhiwei
,
21:36
Re: [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
,
weiwei
,
21:31
Re: [PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op
,
weiwei
,
21:31
Re: [PATCH 08/18] target/riscv: Simplify getting RISCVCPU pointer from env
,
LIU Zhiwei
,
21:30
Re: [PATCH 07/18] target/riscv: Simplify {read,write}_pmpcfg() a little bit
,
LIU Zhiwei
,
21:26
Re: [PATCH 06/18] target/riscv: Use 'bool' type for read_only
,
LIU Zhiwei
,
21:24
Re: [PATCH 05/18] target/riscv: Coding style fixes in csr.c
,
LIU Zhiwei
,
21:24
Re: [PATCH 04/18] target/riscv: gdbstub: Do not generate CSR XML if Zicsr is disabled
,
LIU Zhiwei
,
21:23
Re: [PATCH 03/18] target/riscv: gdbstub: Minor change for better readability
,
LIU Zhiwei
,
21:20
Re: [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
,
LIU Zhiwei
,
21:19
Re: [PATCH 02/18] target/riscv: Correct the priority policy of riscv_csrrw_check()
,
LIU Zhiwei
,
21:15
Re: [PATCH 01/18] target/riscv: gdbstub: Check priv spec version before reporting CSR
,
LIU Zhiwei
,
21:11
Re: [PATCH v6 9/9] target/riscv/cpu: remove CPUArchState::features and friends
,
LIU Zhiwei
,
21:05
Re: [PATCH v6 8/9] target/riscv: remove RISCV_FEATURE_MMU
,
LIU Zhiwei
,
21:04
Re: [PATCH v6 7/9] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
,
LIU Zhiwei
,
21:00
Re: [PATCH 18/18] target/riscv: Move configuration check to envcfg CSRs predicate()
,
Bin Meng
,
20:59
Re: [PATCH v6 6/9] target/riscv: remove RISCV_FEATURE_PMP
,
LIU Zhiwei
,
20:59
Re: [PATCH v6 5/9] target/riscv: remove RISCV_FEATURE_EPMP
,
LIU Zhiwei
,
20:58
Re: [PATCH v6 4/9] target/riscv/cpu.c: error out if EPMP is enabled without PMP
,
LIU Zhiwei
,
20:55
Re: [PATCH v6 3/9] target/riscv: remove RISCV_FEATURE_DEBUG
,
LIU Zhiwei
,
20:53
Re: [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
,
LIU Zhiwei
,
20:50
Re: [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
,
LIU Zhiwei
,
20:45
Re: [PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op
,
LIU Zhiwei
,
20:42
Re: [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
,
Bin Meng
,
19:47
Re: [PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
,
Bin Meng
,
19:46
[PATCH v6 9/9] target/riscv/cpu: remove CPUArchState::features and friends
,
Daniel Henrique Barboza
,
16:56
[PATCH v6 8/9] target/riscv: remove RISCV_FEATURE_MMU
,
Daniel Henrique Barboza
,
16:56
[PATCH v6 7/9] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
,
Daniel Henrique Barboza
,
16:56
[PATCH v6 6/9] target/riscv: remove RISCV_FEATURE_PMP
,
Daniel Henrique Barboza
,
16:56
[PATCH v6 5/9] target/riscv: remove RISCV_FEATURE_EPMP
,
Daniel Henrique Barboza
,
16:56
[PATCH v6 4/9] target/riscv/cpu.c: error out if EPMP is enabled without PMP
,
Daniel Henrique Barboza
,
16:56
[PATCH v6 3/9] target/riscv: remove RISCV_FEATURE_DEBUG
,
Daniel Henrique Barboza
,
16:56
[PATCH v6 2/9] target/riscv: introduce riscv_cpu_cfg()
,
Daniel Henrique Barboza
,
16:56
[PATCH v6 1/9] target/riscv: turn write_misa() into an official no-op
,
Daniel Henrique Barboza
,
16:56
[PATCH v6 0/9] make write_misa a no-op and FEATURE_* cleanups
,
Daniel Henrique Barboza
,
16:56
Re: [PATCH v5 2/9] target/riscv: introduce riscv_cpu_cfg()
,
Richard Henderson
,
14:12
Re: [PATCH V3 5/8] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Andrew Jones
,
12:38
Re: [PATCH V3 4/8] hw/riscv/virt: Enable basic ACPI infrastructure
,
Andrew Jones
,
12:36
Re: [PATCH V2 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Sunil V L
,
12:26
Re: [PATCH v2 05/14] target/riscv: Fix relationship between V, Zve*, F and D
,
Daniel Henrique Barboza
,
11:42
[PATCH V3 8/8] MAINTAINERS: Add entry for RISC-V ACPI
,
Sunil V L
,
11:42
[PATCH V3 7/8] hw/riscv/virt.c: Initialize the ACPI tables
,
Sunil V L
,
11:41
[PATCH V3 6/8] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table
,
Sunil V L
,
11:41
[PATCH V3 5/8] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Sunil V L
,
11:41
[PATCH V3 4/8] hw/riscv/virt: Enable basic ACPI infrastructure
,
Sunil V L
,
11:41
[PATCH V3 3/8] hw/riscv/virt: Add memmap pointer to RiscVVirtState
,
Sunil V L
,
11:41
[PATCH V3 2/8] hw/riscv/virt: Add a switch to disable ACPI
,
Sunil V L
,
11:41
[PATCH V3 1/8] hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
,
Sunil V L
,
11:41
[PATCH V3 0/8] Add basic ACPI support for risc-v virt
,
Sunil V L
,
11:41
Re: [PATCH 18/18] target/riscv: Move configuration check to envcfg CSRs predicate()
,
Palmer Dabbelt
,
11:40
Re: [PATCH V2 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Palmer Dabbelt
,
11:26
[PATCH v5 9/9] target/riscv/cpu: remove CPUArchState::features and friends
,
Daniel Henrique Barboza
,
11:22
[PATCH v5 8/9] target/riscv: remove RISCV_FEATURE_MMU
,
Daniel Henrique Barboza
,
11:22
[PATCH v5 7/9] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
,
Daniel Henrique Barboza
,
11:21
[PATCH v5 6/9] target/riscv: remove RISCV_FEATURE_PMP
,
Daniel Henrique Barboza
,
11:21
[PATCH v5 5/9] target/riscv: remove RISCV_FEATURE_EPMP
,
Daniel Henrique Barboza
,
11:21
[PATCH v5 4/9] target/riscv/cpu.c: error out if EPMP is enabled without PMP
,
Daniel Henrique Barboza
,
11:21
[PATCH v5 3/9] target/riscv: remove RISCV_FEATURE_DEBUG
,
Daniel Henrique Barboza
,
11:21
[PATCH v5 2/9] target/riscv: introduce riscv_cpu_cfg()
,
Daniel Henrique Barboza
,
11:21
[PATCH v5 1/9] target/riscv: turn write_misa() into an official no-op
,
Daniel Henrique Barboza
,
11:21
[PATCH v5 0/9] make write_misa a no-op and FEATURE_* cleanups
,
Daniel Henrique Barboza
,
11:21
Re: [PATCH] target/riscv: Fix vslide1up.vf and vslide1down.vf
,
Palmer Dabbelt
,
11:18
Re: [PATCH] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
,
Palmer Dabbelt
,
11:11
Re: [PATCH v4 02/10] target/riscv: remove RISCV_FEATURE_MISA
,
Daniel Henrique Barboza
,
10:26
Re: [PATCH v4 02/10] target/riscv: remove RISCV_FEATURE_MISA
,
Andrew Jones
,
09:52
Re: [PATCH v4 01/10] target/riscv: turn write_misa() into an official no-op
,
Andrew Jones
,
09:51
[PATCH 5/5] hw/riscv: Restrict CPU clusters to the expected type
,
Philippe Mathieu-Daudé
,
09:24
[PATCH 4/5] hw/arm: Restrict CPU clusters to the expected type
,
Philippe Mathieu-Daudé
,
09:24
[PATCH 3/5] hw/cpu/cluster: Restrict CPU cluster to a particular CPU type
,
Philippe Mathieu-Daudé
,
09:24
[PATCH 2/5] hw/cpu/cluster: Only add CPU objects to CPU cluster
,
Philippe Mathieu-Daudé
,
09:23
[PATCH 1/5] hw/cpu: Extend CPUState::cluster_index documentation
,
Philippe Mathieu-Daudé
,
09:23
[PATCH 0/5] hw/cpu/cluster: Restrict CPU cluster to a particular CPU type
,
Philippe Mathieu-Daudé
,
09:23
Re: [PATCH v4 02/10] target/riscv: remove RISCV_FEATURE_MISA
,
Bin Meng
,
08:31
Re: [PATCH v3 02/10] target/riscv: always allow write_misa() to write MISA
,
Bin Meng
,
08:31
Re: [PATCH v4 01/10] target/riscv: turn write_misa() into an official no-op
,
Bin Meng
,
08:27
[PATCH v4 10/10] target/riscv/cpu: remove CPUArchState::features and friends
,
Daniel Henrique Barboza
,
08:05
[PATCH v4 09/10] target/riscv: remove RISCV_FEATURE_MMU
,
Daniel Henrique Barboza
,
08:05
[PATCH v4 07/10] target/riscv: remove RISCV_FEATURE_PMP
,
Daniel Henrique Barboza
,
08:05
[PATCH v4 08/10] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
,
Daniel Henrique Barboza
,
08:05
[PATCH v4 06/10] target/riscv: remove RISCV_FEATURE_EPMP
,
Daniel Henrique Barboza
,
08:05
[PATCH v4 05/10] target/riscv/cpu.c: error out if EPMP is enabled without PMP
,
Daniel Henrique Barboza
,
08:05
[PATCH v4 03/10] target/riscv: introduce riscv_cpu_cfg()
,
Daniel Henrique Barboza
,
08:05
[PATCH v4 04/10] target/riscv: remove RISCV_FEATURE_DEBUG
,
Daniel Henrique Barboza
,
08:05
[PATCH v4 02/10] target/riscv: remove RISCV_FEATURE_MISA
,
Daniel Henrique Barboza
,
08:05
[PATCH v4 01/10] target/riscv: turn write_misa() into an official no-op
,
Daniel Henrique Barboza
,
08:05
[PATCH v4 00/10] make write_misa a no-op and FEATURE_* cleanups
,
Daniel Henrique Barboza
,
08:04
Re: [PATCH v3 02/10] target/riscv: always allow write_misa() to write MISA
,
Daniel Henrique Barboza
,
07:16
Re: [PATCH v3 02/10] target/riscv: always allow write_misa() to write MISA
,
Andrew Jones
,
05:08
Re: [PATCH v3 02/10] target/riscv: always allow write_misa() to write MISA
,
Bin Meng
,
04:34
Re: [PATCH v3 02/10] target/riscv: always allow write_misa() to write MISA
,
Andrew Jones
,
04:29
Re: [PATCH v1 RFC Zisslpcfi 7/9] target/riscv: Tracking indirect branches (fcfi) using TCG
,
Richard Henderson
,
01:05
Re: [PATCH v1 RFC Zisslpcfi 7/9] target/riscv: Tracking indirect branches (fcfi) using TCG
,
Deepak Gupta
,
00:45
Re: [PATCH v1 RFC Zisslpcfi 6/9] target/riscv: MMU changes for back cfi's shadow stack
,
Deepak Gupta
,
00:43
Re: [PATCH v1 RFC Zisslpcfi 3/9] target/riscv: implements CSRs and new bits in existing CSRs in zisslpcfi
,
Deepak Gupta
,
00:20
February 15, 2023
Re: [PATCH v1 RFC Zisslpcfi 1/9] target/riscv: adding zimops and zisslpcfi extension to RISCV cpu config
,
Richard Henderson
,
23:20
Re: [PATCH v1 RFC Zisslpcfi 7/9] target/riscv: Tracking indirect branches (fcfi) using TCG
,
LIU Zhiwei
,
21:44
Re: [PATCH v1 RFC Zisslpcfi 3/9] target/riscv: implements CSRs and new bits in existing CSRs in zisslpcfi
,
Richard Henderson
,
21:44
Re: [PATCH v1 RFC Zisslpcfi 6/9] target/riscv: MMU changes for back cfi's shadow stack
,
LIU Zhiwei
,
21:36
Re: [PATCH v1 RFC Zisslpcfi 1/9] target/riscv: adding zimops and zisslpcfi extension to RISCV cpu config
,
LIU Zhiwei
,
20:46
Re: [PATCH v1 RFC Zisslpcfi 3/9] target/riscv: implements CSRs and new bits in existing CSRs in zisslpcfi
,
Deepak Gupta
,
20:39
Re: [PATCH v3 02/10] target/riscv: always allow write_misa() to write MISA
,
weiwei
,
20:37
Re: [PATCH v3 02/10] target/riscv: always allow write_misa() to write MISA
,
Bin Meng
,
19:32
Re: [PATCH v1 RFC Zisslpcfi 3/9] target/riscv: implements CSRs and new bits in existing CSRs in zisslpcfi
,
Richard Henderson
,
19:03
Re: [PATCH v1 RFC Zisslpcfi 7/9] target/riscv: Tracking indirect branches (fcfi) using TCG
,
Deepak Gupta
,
19:02
Re: [PATCH v1 RFC Zisslpcfi 6/9] target/riscv: MMU changes for back cfi's shadow stack
,
Deepak Gupta
,
18:58
Re: [PATCH v1 RFC Zisslpcfi 3/9] target/riscv: implements CSRs and new bits in existing CSRs in zisslpcfi
,
Deepak Gupta
,
18:42
Re: [PATCH v1 RFC Zisslpcfi 4/9] target/riscv: helper functions for forward and backward cfi
,
Deepak Gupta
,
18:36
Re: [PATCH v1 RFC Zisslpcfi 3/9] target/riscv: implements CSRs and new bits in existing CSRs in zisslpcfi
,
Deepak Gupta
,
18:33
Re: [PATCH v1 RFC Zisslpcfi 5/9] target/riscv: state save and restore of zisslppcfi state
,
Deepak Gupta
,
18:14
Re: [PATCH v5 3/4] target/riscv: implement Zicbom extension
,
Richard Henderson
,
17:19
Re: [PATCH v5 4/4] target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder
,
Richard Henderson
,
17:15
Re: [PATCH v5 3/4] target/riscv: implement Zicbom extension
,
Richard Henderson
,
17:13
Re: [PATCH v5 2/4] target/riscv: implement Zicboz extension
,
Richard Henderson
,
16:28
[PATCH v5 3/4] target/riscv: implement Zicbom extension
,
Daniel Henrique Barboza
,
15:59
[PATCH v5 4/4] target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder
,
Daniel Henrique Barboza
,
15:59
[PATCH v5 2/4] target/riscv: implement Zicboz extension
,
Daniel Henrique Barboza
,
15:59
[PATCH v5 1/4] accel/tcg: Add probe_access_range_flags interface
,
Daniel Henrique Barboza
,
15:59
[PATCH v5 0/4] riscv: Add support for Zicbo[m,z,p] instructions
,
Daniel Henrique Barboza
,
15:59
Re: [PATCH v1 RFC Zisslpcfi 1/9] target/riscv: adding zimops and zisslpcfi extension to RISCV cpu config
,
Deepak Gupta
,
15:47
Re: [PATCH v1 RFC Zisslpcfi 2/9] target/riscv: zisslpcfi CSR, bit positions and other definitions
,
Deepak Gupta
,
15:42
[PATCH v3 10/10] target/riscv/cpu: remove CPUArchState::features and friends
,
Daniel Henrique Barboza
,
13:58
[PATCH v3 09/10] target/riscv: remove RISCV_FEATURE_MMU
,
Daniel Henrique Barboza
,
13:58
[PATCH v3 06/10] target/riscv: remove RISCV_FEATURE_EPMP
,
Daniel Henrique Barboza
,
13:58
[PATCH v3 08/10] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
,
Daniel Henrique Barboza
,
13:58
[PATCH v3 07/10] target/riscv: remove RISCV_FEATURE_PMP
,
Daniel Henrique Barboza
,
13:58
[PATCH v3 03/10] target/riscv: introduce riscv_cpu_cfg()
,
Daniel Henrique Barboza
,
13:58
[PATCH v3 05/10] target/riscv/cpu.c: error out if EPMP is enabled without PMP
,
Daniel Henrique Barboza
,
13:57
[PATCH v3 04/10] target/riscv: remove RISCV_FEATURE_DEBUG
,
Daniel Henrique Barboza
,
13:57
[PATCH v3 02/10] target/riscv: always allow write_misa() to write MISA
,
Daniel Henrique Barboza
,
13:57
[PATCH v3 01/10] target/riscv: do not mask unsupported QEMU extensions in write_misa()
,
Daniel Henrique Barboza
,
13:57
[PATCH v3 00/10] enable write_misa() and RISCV_FEATURE_* cleanups
,
Daniel Henrique Barboza
,
13:57
Re: [PATCH V2 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Sunil V L
,
09:08
Re: [PATCH V2 08/10] hw/riscv/Kconfig: virt: Enable ACPI config option
,
Sunil V L
,
09:06
Re: [PATCH v2 00/11] enable write_misa() and RISCV_FEATURE_* cleanups
,
Andrew Jones
,
08:45
Re: [PATCH V2 10/10] MAINTAINERS: Add entry for RISC-V ACPI
,
Andrew Jones
,
08:28
Re: [PATCH V2 09/10] hw/riscv/virt.c: Initialize the ACPI tables
,
Andrew Jones
,
08:24
Re: [PATCH V2 08/10] hw/riscv/Kconfig: virt: Enable ACPI config option
,
Andrew Jones
,
08:24
Re: [PATCH V2 07/10] hw/riscv: meson.build: Build virt-acpi-build.c
,
Andrew Jones
,
08:24
Re: [PATCH V2 06/10] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table
,
Andrew Jones
,
08:22
Re: [PATCH V2 05/10] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Andrew Jones
,
08:05
Re: [PATCH V2 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Andrew Jones
,
07:56
Re: [PATCH V2 03/10] hw/riscv/virt: Add memmap pointer to RiscVVirtState
,
Andrew Jones
,
07:25
Re: [PATCH V2 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Andrew Jones
,
07:24
Re: [PATCH V2 01/10] hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
,
Andrew Jones
,
07:18
Re: [PATCH v2 09/11] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
,
Bin Meng
,
06:23
Re: [PATCH v2 08/11] target/riscv: remove RISCV_FEATURE_PMP
,
Bin Meng
,
06:23
Re: [PATCH v2 11/11] target/riscv/cpu: remove CPUArchState::features and friends
,
Bin Meng
,
06:23
Re: [PATCH v2 10/11] target/riscv: remove RISCV_FEATURE_MMU
,
Bin Meng
,
06:23
Re: [PATCH v2 06/11] target/riscv/cpu.c: error out if EPMP is enabled without PMP
,
Bin Meng
,
06:23
Re: [PATCH v2 07/11] target/riscv: remove RISCV_FEATURE_EPMP
,
Bin Meng
,
06:23
Re: [PATCH v2 05/11] target/riscv: remove RISCV_FEATURE_DEBUG
,
Bin Meng
,
06:23
Re: [PATCH v2 02/11] target/riscv: introduce riscv_cpu_cfg()
,
Bin Meng
,
06:23
Re: [PATCH v2 01/11] target/riscv: do not mask unsupported QEMU extensions in write_misa()
,
Bin Meng
,
06:22
Re: [PATCH v1 RFC Zisslpcfi 8/9] target/riscv: Instructions encodings, implementation and handlers
,
LIU Zhiwei
,
05:43
Re: [PATCH v1 RFC Zisslpcfi 7/9] target/riscv: Tracking indirect branches (fcfi) using TCG
,
LIU Zhiwei
,
03:55
Re: [PATCH v2 03/11] target/riscv: allow users to actually write the MISA CSR
,
Bin Meng
,
03:45
Re: [PATCH v1 RFC Zisslpcfi 6/9] target/riscv: MMU changes for back cfi's shadow stack
,
LIU Zhiwei
,
03:44
Re: [PATCH v1 RFC Zisslpcfi 4/9] target/riscv: helper functions for forward and backward cfi
,
LIU Zhiwei
,
01:26
Re: [PATCH v1 RFC Zisslpcfi 3/9] target/riscv: implements CSRs and new bits in existing CSRs in zisslpcfi
,
LIU Zhiwei
,
01:24
Re: [PATCH v1 RFC Zisslpcfi 5/9] target/riscv: state save and restore of zisslppcfi state
,
LIU Zhiwei
,
01:11
Re: [PATCH v1 RFC Zisslpcfi 3/9] target/riscv: implements CSRs and new bits in existing CSRs in zisslpcfi
,
LIU Zhiwei
,
00:48
February 14, 2023
Re: [PATCH v1 RFC Zisslpcfi 2/9] target/riscv: zisslpcfi CSR, bit positions and other definitions
,
LIU Zhiwei
,
22:31
Re: [PATCH 18/18] target/riscv: Move configuration check to envcfg CSRs predicate()
,
weiwei
,
21:57
Re: [PATCH v1 RFC Zisslpcfi 1/9] target/riscv: adding zimops and zisslpcfi extension to RISCV cpu config
,
LIU Zhiwei
,
21:52
Re: [PATCH 18/18] target/riscv: Move configuration check to envcfg CSRs predicate()
,
Bin Meng
,
21:22
[PATCH v2 08/14] target/riscv: Simplify check for Zve32f and Zve64f
,
Weiwei Li
,
21:13
[PATCH v2 12/14] target/riscv: Fix check for vector load/store instructions when EEW=64
,
Weiwei Li
,
21:12
[PATCH v2 13/14] target/riscv: Simplify check for EEW = 64 in trans_rvv.c.inc
,
Weiwei Li
,
21:12
[PATCH v2 09/14] target/riscv: Replace check for F/D to Zve32f/Zve64d in trans_rvv.c.inc
,
Weiwei Li
,
21:06
[PATCH v2 11/14] target/riscv: Add support for Zvfh/zvfhmin extensions
,
Weiwei Li
,
21:06
[PATCH v2 06/14] target/riscv: Add propertie check for Zvfh{min} extensions
,
Weiwei Li
,
21:06
[PATCH v2 00/14] target/riscv: Some updates to float point related extensions
,
Weiwei Li
,
21:06
[PATCH v2 02/14] target/riscv: Fix the relationship between Zhinxmin and Zhinx
,
Weiwei Li
,
21:06
[PATCH v2 14/14] target/riscv: Expose properties for Zv* extensions
,
Weiwei Li
,
21:06
[PATCH v2 03/14] target/riscv: Simplify the check for Zfhmin and Zhinxmin
,
Weiwei Li
,
21:06
[PATCH v2 10/14] target/riscv: Remove rebundunt check for zve32f and zve64f
,
Weiwei Li
,
21:06
[PATCH v2 04/14] target/riscv: Add cfg properties for Zv* extensions
,
Weiwei Li
,
21:06
[PATCH v2 05/14] target/riscv: Fix relationship between V, Zve*, F and D
,
Weiwei Li
,
21:06
[PATCH v2 01/14] target/riscv: Fix the relationship between Zfhmin and Zfh
,
Weiwei Li
,
21:06
[PATCH v2 07/14] target/riscv: Indent fixes in cpu.c
,
Weiwei Li
,
21:06
[PATCH v2 11/11] target/riscv/cpu: remove CPUArchState::features and friends
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 10/11] target/riscv: remove RISCV_FEATURE_MMU
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 09/11] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 08/11] target/riscv: remove RISCV_FEATURE_PMP
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 07/11] target/riscv: remove RISCV_FEATURE_EPMP
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 06/11] target/riscv/cpu.c: error out if EPMP is enabled without PMP
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 05/11] target/riscv: remove RISCV_FEATURE_DEBUG
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 04/11] target/riscv: remove RISCV_FEATURE_MISA
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 03/11] target/riscv: allow users to actually write the MISA CSR
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 02/11] target/riscv: introduce riscv_cpu_cfg()
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 01/11] target/riscv: do not mask unsupported QEMU extensions in write_misa()
,
Daniel Henrique Barboza
,
14:24
[PATCH v2 00/11] enable write_misa() and RISCV_FEATURE_* cleanups
,
Daniel Henrique Barboza
,
14:24
Re: [PATCH 02/11] target/riscv: allow users to actually write the MISA CSR
,
Daniel Henrique Barboza
,
12:40
Re: [PATCH 11/11] target/riscv/cpu: remove CPUArchState^features and friends
,
weiwei
,
10:26
Re: [PATCH 10/11] target/riscv: remove RISCV_FEATURE_MMU
,
weiwei
,
10:25
Re: [PATCH 09/11] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
,
weiwei
,
10:23
Re: [PATCH 08/11] target/riscv: remove RISCV_FEATURE_PMP
,
weiwei
,
10:19
Re: [PATCH 07/11] target/riscv: remove RISCV_FEATURE_EPMP
,
weiwei
,
10:18
Re: [PATCH 06/11] target/riscv/cpu.c: error out if EPMP is enabled without PMP
,
weiwei
,
10:17
Re: [PATCH 05/11] target/riscv: remove RISCV_FEATURE_DEBUG
,
weiwei
,
10:15
Re: [PATCH 04/11] target/riscv: introduce riscv_cpu_cfg()
,
weiwei
,
10:13
Re: [PATCH 03/11] target/riscv: remove RISCV_FEATURE_MISA
,
weiwei
,
10:12
Re: [PATCH 02/11] target/riscv: allow users to actually write the MISA CSR
,
weiwei
,
10:12
Re: [PATCH 18/18] target/riscv: Move configuration check to envcfg CSRs predicate()
,
weiwei
,
09:59
Re: [PATCH 00/18] target/riscv: Various fixes to gdbstub and CSR access
,
Bin Meng
,
09:31
[PATCH 18/18] target/riscv: Move configuration check to envcfg CSRs predicate()
,
Bin Meng
,
09:27
Re: [Patch 05/14] target/riscv: Fix relationship between V, Zve*, F and D
,
Daniel Henrique Barboza
,
09:23
Re: [Patch 13/14] target/riscv: Simplify check for EEW = 64 in trans_rvv.c.inc
,
weiwei
,
08:44
Re: [Patch 05/14] target/riscv: Fix relationship between V, Zve*, F and D
,
weiwei
,
08:41
Re: [Patch 14/14] target/riscv: Expose properties for Zv* extension
,
Daniel Henrique Barboza
,
08:40
Re: [Patch 13/14] target/riscv: Simplify check for EEW = 64 in trans_rvv.c.inc
,
Daniel Henrique Barboza
,
08:37
Re: [Patch 12/14] target/riscv: Fix check for vectore load/store instructions when EEW=64
,
Daniel Henrique Barboza
,
08:33
Re: [Patch 11/14] target/riscv: Add support for Zvfh/zvfhmin extensions
,
Daniel Henrique Barboza
,
08:30
Re: [Patch 10/14] target/riscv: Remove rebundunt check for zve32f and zve64f
,
Daniel Henrique Barboza
,
08:28
Re: [Patch 09/14] target/riscv: Replace check for F/D to Zve32f/Zve64d in trans_rvv.c.inc
,
Daniel Henrique Barboza
,
08:26
Re: [Patch 08/14] target/riscv: Simplify check for Zve32f and Zve64f
,
Daniel Henrique Barboza
,
08:25
Re: [Patch 07/14] target/riscv: Indent fixes in cpu.c
,
Daniel Henrique Barboza
,
08:25
Re: [Patch 06/14] target/riscv: Add propertie check for Zvfh{min} extensions
,
Daniel Henrique Barboza
,
08:24
Re: [Patch 05/14] target/riscv: Fix relationship between V, Zve*, F and D
,
Daniel Henrique Barboza
,
08:21
Re: [Patch 04/14] target/riscv: Add cfg properties for Zv* extension
,
Daniel Henrique Barboza
,
07:14
Re: [Patch 03/14] target/riscv: Simplify the check for Zfhmin and Zhinxmin
,
Daniel Henrique Barboza
,
07:13
Re: [Patch 02/14] target/riscv: Fix the relationship between Zhinxmin and Zhinx
,
Daniel Henrique Barboza
,
07:10
Re: [Patch 01/14] target/riscv: Fix the relationship between Zfhmin and Zfh
,
Daniel Henrique Barboza
,
07:09
Re: [PATCH 17/18] target/riscv: Group all predicate() routines together
,
weiwei
,
04:27
Re: [PATCH 16/18] target/riscv: Drop priv level check in mseccfg predicate()
,
weiwei
,
04:27
Re: [PATCH 15/18] target/riscv: Allow debugger to access sstc CSRs
,
weiwei
,
04:26
Re: [PATCH 14/18] target/riscv: Allow debugger to access {h, s}stateen CSRs
,
weiwei
,
04:24
Re: [PATCH 13/18] target/riscv: Allow debugger to access seed CSR
,
weiwei
,
04:19
Re: [PATCH 12/18] target/riscv: Allow debugger to access user timer and counter CSRs
,
weiwei
,
04:16
Re: [PATCH 11/18] target/riscv: gdbstub: Drop the vector CSRs in riscv-vector.xml
,
weiwei
,
04:13
Re: [PATCH 10/18] target/riscv: gdbstub: Turn on debugger mode before calling CSR predicate()
,
weiwei
,
04:02
Re: [PATCH 09/18] target/riscv: Avoid reporting odd-numbered pmpcfgX in the CSR XML for RV64
,
weiwei
,
03:56
Re: [PATCH 08/18] target/riscv: Simplify getting RISCVCPU pointer from env
,
weiwei
,
03:52
Re: [PATCH 07/18] target/riscv: Simplify {read,write}_pmpcfg() a little bit
,
weiwei
,
03:50
Re: [PATCH 06/18] target/riscv: Use 'bool' type for read_only
,
weiwei
,
03:49
Re: [PATCH 05/18] target/riscv: Coding style fixes in csr.c
,
weiwei
,
03:48
[Patch 09/14] target/riscv: Replace check for F/D to Zve32f/Zve64d in trans_rvv.c.inc
,
Weiwei Li
,
03:46
[Patch 13/14] target/riscv: Simplify check for EEW = 64 in trans_rvv.c.inc
,
Weiwei Li
,
03:46
[Patch 14/14] target/riscv: Expose properties for Zv* extension
,
Weiwei Li
,
03:46
Re: [PATCH 04/18] target/riscv: gdbstub: Do not generate CSR XML if Zicsr is disabled
,
weiwei
,
03:46
Re: [PATCH 03/18] target/riscv: gdbstub: Minor change for better readability
,
weiwei
,
03:45
Re: [PATCH V2 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Daniel Henrique Barboza
,
03:44
Re: [PATCH 02/18] target/riscv: Correct the priority policy of riscv_csrrw_check()
,
weiwei
,
03:43
Re: [PATCH 01/18] target/riscv: gdbstub: Check priv spec version before reporting CSR
,
weiwei
,
03:40
[Patch 12/14] target/riscv: Fix check for vectore load/store instructions when EEW=64
,
Weiwei Li
,
03:39
[Patch 11/14] target/riscv: Add support for Zvfh/zvfhmin extensions
,
Weiwei Li
,
03:39
[Patch 08/14] target/riscv: Simplify check for Zve32f and Zve64f
,
Weiwei Li
,
03:38
[Patch 05/14] target/riscv: Fix relationship between V, Zve*, F and D
,
Weiwei Li
,
03:38
[Patch 10/14] target/riscv: Remove rebundunt check for zve32f and zve64f
,
Weiwei Li
,
03:38
[Patch 06/14] target/riscv: Add propertie check for Zvfh{min} extensions
,
Weiwei Li
,
03:38
[Patch 00/14] target/riscv: Some updates to float point related extensions
,
Weiwei Li
,
03:38
[Patch 04/14] target/riscv: Add cfg properties for Zv* extension
,
Weiwei Li
,
03:38
[Patch 01/14] target/riscv: Fix the relationship between Zfhmin and Zfh
,
Weiwei Li
,
03:38
[Patch 02/14] target/riscv: Fix the relationship between Zhinxmin and Zhinx
,
Weiwei Li
,
03:38
[Patch 03/14] target/riscv: Simplify the check for Zfhmin and Zhinxmin
,
Weiwei Li
,
03:38
[Patch 07/14] target/riscv: Indent fixes in cpu.c
,
Weiwei Li
,
03:38
Re: [PATCH V2 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Andrew Jones
,
01:56
February 13, 2023
[PATCH 17/18] target/riscv: Group all predicate() routines together
,
Bin Meng
,
23:33
[PATCH 16/18] target/riscv: Drop priv level check in mseccfg predicate()
,
Bin Meng
,
23:22
[PATCH 15/18] target/riscv: Allow debugger to access sstc CSRs
,
Bin Meng
,
23:21
Re: [PATCH V2 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Bin Meng
,
23:03
Re: [PATCH V2 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Sunil V L
,
22:43
[PATCH 14/18] target/riscv: Allow debugger to access {h, s}stateen CSRs
,
Bin Meng
,
22:07
[PATCH 13/18] target/riscv: Allow debugger to access seed CSR
,
Bin Meng
,
20:11
[PATCH 12/18] target/riscv: Allow debugger to access user timer and counter CSRs
,
Bin Meng
,
20:11
Re: [PATCH 00/18] target/riscv: Various fixes to gdbstub and CSR access
,
Daniel Henrique Barboza
,
14:20
Re: [PATCH V2 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Daniel Henrique Barboza
,
13:48
[PATCH 11/18] target/riscv: gdbstub: Drop the vector CSRs in riscv-vector.xml
,
Bin Meng
,
13:08
[PATCH 09/18] target/riscv: Avoid reporting odd-numbered pmpcfgX in the CSR XML for RV64
,
Bin Meng
,
13:07
[PATCH 08/18] target/riscv: Simplify getting RISCVCPU pointer from env
,
Bin Meng
,
13:07
[PATCH 10/18] target/riscv: gdbstub: Turn on debugger mode before calling CSR predicate()
,
Bin Meng
,
13:07
[PATCH 07/18] target/riscv: Simplify {read, write}_pmpcfg() a little bit
,
Bin Meng
,
13:07
[PATCH 02/18] target/riscv: Correct the priority policy of riscv_csrrw_check()
,
Bin Meng
,
13:03
[PATCH 04/18] target/riscv: gdbstub: Do not generate CSR XML if Zicsr is disabled
,
Bin Meng
,
13:03
[PATCH 06/18] target/riscv: Use 'bool' type for read_only
,
Bin Meng
,
13:03
[PATCH 05/18] target/riscv: Coding style fixes in csr.c
,
Bin Meng
,
13:03
[PATCH 00/18] target/riscv: Various fixes to gdbstub and CSR access
,
Bin Meng
,
13:03
[PATCH 03/18] target/riscv: gdbstub: Minor change for better readability
,
Bin Meng
,
13:03
[PATCH 01/18] target/riscv: gdbstub: Check priv spec version before reporting CSR
,
Bin Meng
,
13:03
Re: [PATCH] target/riscv: Fix vslide1up.vf and vslide1down.vf
,
Frank Chang
,
10:57
[PATCH V2 09/10] hw/riscv/virt.c: Initialize the ACPI tables
,
Sunil V L
,
09:41
[PATCH V2 10/10] MAINTAINERS: Add entry for RISC-V ACPI
,
Sunil V L
,
09:41
[PATCH V2 08/10] hw/riscv/Kconfig: virt: Enable ACPI config option
,
Sunil V L
,
09:41
[PATCH V2 07/10] hw/riscv: meson.build: Build virt-acpi-build.c
,
Sunil V L
,
09:41
[PATCH V2 06/10] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table
,
Sunil V L
,
09:41
[PATCH V2 05/10] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Sunil V L
,
09:41
[PATCH V2 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Sunil V L
,
09:41
[PATCH V2 03/10] hw/riscv/virt: Add memmap pointer to RiscVVirtState
,
Sunil V L
,
09:40
[PATCH V2 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Sunil V L
,
09:40
[PATCH V2 01/10] hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
,
Sunil V L
,
09:40
[PATCH V2 00/10] Add basic ACPI support for risc-v virt
,
Sunil V L
,
09:40
Re: [PATCH] target/riscv: Fix vslide1up.vf and vslide1down.vf
,
weiwei
,
05:30
[PATCH] target/riscv: Fix vslide1up.vf and vslide1down.vf
,
LIU Zhiwei
,
04:46
Re: [PATCH] target/riscv: Smepmp: Skip applying default rules when address matches
,
LIU Zhiwei
,
00:42
Re: [PATCH] target/riscv: Smepmp: Skip applying default rules when address matches
,
Himanshu Chauhan
,
00:21
February 12, 2023
Re: [PATCH] target/riscv: Smepmp: Skip applying default rules when address matches
,
LIU Zhiwei
,
23:23
Re: [PATCH v1 RFC Zisslpcfi 2/9] target/riscv: zisslpcfi CSR, bit positions and other definitions
,
Deepak Gupta
,
22:21
Re: [PATCH v1 RFC Zisslpcfi 1/9] target/riscv: adding zimops and zisslpcfi extension to RISCV cpu config
,
Deepak Gupta
,
22:15
February 11, 2023
Re: [PATCH 02/11] target/riscv: allow users to actually write the MISA CSR
,
Daniel Henrique Barboza
,
06:50
February 10, 2023
Re: [PATCH v1 RFC Zisslpcfi 2/9] target/riscv: zisslpcfi CSR, bit positions and other definitions
,
weiwei
,
22:32
Re: [PATCH v1 RFC Zisslpcfi 1/9] target/riscv: adding zimops and zisslpcfi extension to RISCV cpu config
,
weiwei
,
22:19
Re: [PATCH] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
,
weiwei
,
21:51
Re: [PATCH 02/11] target/riscv: allow users to actually write the MISA CSR
,
weiwei
,
21:44
Re: [PATCH 01/11] target/riscv: do not mask unsupported QEMU extensions in write_misa()
,
weiwei
,
21:23
[PATCH 11/11] target/riscv/cpu: remove CPUArchState::features and friends
,
Daniel Henrique Barboza
,
08:37
[PATCH 10/11] target/riscv: remove RISCV_FEATURE_MMU
,
Daniel Henrique Barboza
,
08:37
[PATCH 09/11] hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in create_fdt_socket_cpus()
,
Daniel Henrique Barboza
,
08:37
[PATCH 08/11] target/riscv: remove RISCV_FEATURE_PMP
,
Daniel Henrique Barboza
,
08:37
[PATCH 07/11] target/riscv: remove RISCV_FEATURE_EPMP
,
Daniel Henrique Barboza
,
08:37
[PATCH 06/11] target/riscv/cpu.c: error out if EPMP is enabled without PMP
,
Daniel Henrique Barboza
,
08:36
[PATCH 05/11] target/riscv: remove RISCV_FEATURE_DEBUG
,
Daniel Henrique Barboza
,
08:36
[PATCH 04/11] target/riscv: introduce riscv_cpu_cfg()
,
Daniel Henrique Barboza
,
08:36
[PATCH 03/11] target/riscv: remove RISCV_FEATURE_MISA
,
Daniel Henrique Barboza
,
08:36
[PATCH 02/11] target/riscv: allow users to actually write the MISA CSR
,
Daniel Henrique Barboza
,
08:36
[PATCH 01/11] target/riscv: do not mask unsupported QEMU extensions in write_misa()
,
Daniel Henrique Barboza
,
08:36
[PATCH 00/11] enable write_misa() and RISCV_FEATURE_* cleanups
,
Daniel Henrique Barboza
,
08:36
Re: [PATCH] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
,
Philippe Mathieu-Daudé
,
07:54
Re: [PATCH] include/hw: Do not include "hw/registerfields.h" in headers that don't need it
,
Philippe Mathieu-Daudé
,
07:43
[PATCH] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
,
Daniel Henrique Barboza
,
07:38
[PATCH] include/hw: Do not include "hw/registerfields.h" in headers that don't need it
,
Thomas Huth
,
06:23
February 09, 2023
Re: [PATCH] target/riscv: Smepmp: Skip applying default rules when address matches
,
Alistair Francis
,
21:41
Re: [PATCH] MAINTAINERS: Add some RISC-V reviewers
,
Alistair Francis
,
20:25
Re: [PATCH v2] target/riscv: Remove privileged spec version restriction for RVV
,
Alistair Francis
,
18:41
Re: [PATCH] target/riscv: Smepmp: Skip applying default rules when address matches
,
Alistair Francis
,
18:40
Re: [PATCH] target/riscv: Smepmp: Skip applying default rules when address matches
,
Daniel Henrique Barboza
,
04:51
Re: [PATCH] MAINTAINERS: Add some RISC-V reviewers
,
Frank Chang
,
04:43
Re: [PATCH] MAINTAINERS: Add some RISC-V reviewers
,
Daniel Henrique Barboza
,
04:34
Re: [PATCH] MAINTAINERS: Add some RISC-V reviewers
,
Bin Meng
,
04:17
Re: [PATCH] MAINTAINERS: Add some RISC-V reviewers
,
Philippe Mathieu-Daudé
,
02:06
[PATCH v1 RFC Zisslpcfi 9/9] target/riscv: diassembly support for zisslpcfi instructions
,
Deepak Gupta
,
01:31
[PATCH v1 RFC Zisslpcfi 4/9] target/riscv: helper functions for forward and backward cfi
,
Deepak Gupta
,
01:31
[PATCH v1 RFC Zisslpcfi 8/9] target/riscv: Instructions encodings, implementation and handlers
,
Deepak Gupta
,
01:30
[PATCH v1 RFC Zisslpcfi 6/9] target/riscv: MMU changes for back cfi's shadow stack
,
Deepak Gupta
,
01:30
[PATCH v1 RFC Zisslpcfi 7/9] target/riscv: Tracking indirect branches (fcfi) using TCG
,
Deepak Gupta
,
01:30
[PATCH v1 RFC Zisslpcfi 3/9] target/riscv: implements CSRs and new bits in existing CSRs in zisslpcfi
,
Deepak Gupta
,
01:30
[PATCH v1 RFC Zisslpcfi 5/9] target/riscv: state save and restore of zisslppcfi state
,
Deepak Gupta
,
01:30
[PATCH v1 RFC Zisslpcfi 2/9] target/riscv: zisslpcfi CSR, bit positions and other definitions
,
Deepak Gupta
,
01:30
[PATCH v1 RFC Zisslpcfi 1/9] target/riscv: adding zimops and zisslpcfi extension to RISCV cpu config
,
Deepak Gupta
,
01:30
[PATCH v1 RFC Zisslpcfi 9/9] target/riscv: diassembly support for zisslpcfi instructions
,
Deepak Gupta
,
01:24
[PATCH v1 RFC Zisslpcfi 8/9] target/riscv: Instructions encodings, implementation and handlers
,
Deepak Gupta
,
01:24
[PATCH v1 RFC Zisslpcfi 7/9] target/riscv: Tracking indirect branches (fcfi) using TCG
,
Deepak Gupta
,
01:24
[PATCH v1 RFC Zisslpcfi 6/9] target/riscv: MMU changes for back cfi's shadow stack
,
Deepak Gupta
,
01:24
[PATCH v1 RFC Zisslpcfi 5/9] target/riscv: state save and restore of zisslppcfi state
,
Deepak Gupta
,
01:24
[PATCH v1 RFC Zisslpcfi 4/9] target/riscv: helper functions for forward and backward cfi
,
Deepak Gupta
,
01:24
[PATCH v1 RFC Zisslpcfi 3/9] target/riscv: implements CSRs and new bits in existing CSRs in zisslpcfi
,
Deepak Gupta
,
01:24
[PATCH v1 RFC Zisslpcfi 2/9] target/riscv: zisslpcfi CSR, bit positions and other definitions
,
Deepak Gupta
,
01:24
[PATCH v1 RFC Zisslpcfi 1/9] target/riscv: adding zimops and zisslpcfi extension to RISCV cpu config
,
Deepak Gupta
,
01:24
[PATCH] target/riscv: Smepmp: Skip applying default rules when address matches
,
Himanshu Chauhan
,
00:52
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Thomas Huth
,
00:15
February 08, 2023
Re: [PATCH] MAINTAINERS: Add some RISC-V reviewers
,
weiwei
,
23:35
[PATCH v11 9/9] disas/riscv.c: add disasm support for Zc*
,
Weiwei Li
,
23:14
[PATCH v11 8/9] target/riscv: expose properties for Zc* extension
,
Weiwei Li
,
23:14
[PATCH v11 7/9] target/riscv: add support for Zcmt extension
,
Weiwei Li
,
23:14
[PATCH v11 5/9] target/riscv: add support for Zcb extension
,
Weiwei Li
,
23:14
[PATCH v11 6/9] target/riscv: add support for Zcmp extension
,
Weiwei Li
,
23:14
[PATCH v11 3/9] target/riscv: add support for Zcf extension
,
Weiwei Li
,
23:14
[PATCH v11 1/9] target/riscv: add cfg properties for Zc* extension
,
Weiwei Li
,
23:14
[PATCH v11 2/9] target/riscv: add support for Zca extension
,
Weiwei Li
,
23:14
[PATCH v11 4/9] target/riscv: add support for Zcd extension
,
Weiwei Li
,
23:14
[PATCH v11 0/9] support subsets of code size reduction extension
,
Weiwei Li
,
23:14
Re: [PATCH v2] target/riscv: Remove privileged spec version restriction for RVV
,
Alistair Francis
,
23:11
Re: [PATCH] roms/opensbi: Upgrade from v1.1 to v1.2
,
Alistair Francis
,
21:23
Re: [PATCH] roms/opensbi: Upgrade from v1.1 to v1.2
,
Alistair Francis
,
20:38
Re: [PATCH] MAINTAINERS: Add some RISC-V reviewers
,
LIU Zhiwei
,
20:24
Re: [PATCH v11 0/3] Consolidate all kernel init in load_kernel()
,
Alistair Francis
,
19:37
[PATCH] MAINTAINERS: Add some RISC-V reviewers
,
Alistair Francis
,
19:33
Re: [PATCH 10/10] MAINTAINERS: Add entry for RISC-V ACPI
,
Alistair Francis
,
19:24
Re: [PATCH 05/10] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Alistair Francis
,
19:21
Re: [PATCH 03/10] hw/riscv/virt: Add memmap pointer to RiscVVirtState
,
Alistair Francis
,
19:18
Re: [PATCH 01/10] hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
,
Alistair Francis
,
19:17
Re: Fwd: [RFC PATCH 00/39] Add RISC-V cryptography extensions standardisation
,
Palmer Dabbelt
,
14:33
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Andrea Bolognani
,
11:49
[PATCH v2] target/riscv: Remove privileged spec version restriction for RVV
,
frank . chang
,
01:32
Re: [PATCH] target/riscv: Remove .min_priv_ver restriction from RVV CSRs
,
Frank Chang
,
01:30
February 07, 2023
Re: [PATCH 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Sunil V L
,
23:49
Re: [PATCH] target/riscv: Remove .min_priv_ver restriction from RVV CSRs
,
LIU Zhiwei
,
20:37
Re: [PATCH 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Bin Meng
,
20:07
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Andrew Jones
,
14:20
Re: [PATCH 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Sunil V L
,
13:15
Re: [PATCH 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Bin Meng
,
11:11
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Andrea Bolognani
,
09:38
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Thomas Huth
,
09:02
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Andrea Bolognani
,
08:57
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Sunil V L
,
07:34
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Andrew Jones
,
05:24
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Andrew Jones
,
05:14
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Sunil V L
,
05:12
Re: [PATCH] target/riscv: Remove .min_priv_ver restriction from RVV CSRs
,
Bin Meng
,
04:43
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Philippe Mathieu-Daudé
,
03:50
[PATCH] target/riscv: Remove .min_priv_ver restriction from RVV CSRs
,
frank . chang
,
03:43
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Andrew Jones
,
00:37
February 06, 2023
[PATCH] roms/opensbi: Upgrade from v1.1 to v1.2
,
Bin Meng
,
23:40
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Bin Meng
,
22:57
Re: [PATCH] hw/riscv: virt: Simplify virt_{get,set}_aclint()
,
Alistair Francis
,
22:08
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Bernhard Beschow
,
18:14
Re: [PATCH v11 2/3] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
,
Alistair Francis
,
17:55
Re: [PATCH v11 1/3] hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()
,
Alistair Francis
,
17:25
Re: [PATCH] hw/riscv: virt: Simplify virt_{get,set}_aclint()
,
Alistair Francis
,
17:22
Re: [PATCH v4 0/2] riscv: Add support for Zicbo[m,z,p] instructions
,
Daniel Henrique Barboza
,
15:58
Re: [PATCH v11 2/3] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
,
Daniel Henrique Barboza
,
15:18
Re: [PATCH v11 2/3] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
,
Richard Henderson
,
14:54
Re: [PATCH v11 1/3] hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()
,
Philippe Mathieu-Daudé
,
10:12
Re: [PATCH v11 2/3] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
,
Philippe Mathieu-Daudé
,
10:10
Re: [PATCH 18/19] hw/rx: Set QDev properties using QDev API
,
Yoshinori Sato
,
09:33
Re: [PATCH 08/10] hw/riscv/Kconfig: virt: Enable ACPI config options
,
Sunil V L
,
09:20
[PATCH v11 3/3] hw/riscv/boot.c: make riscv_load_initrd() static
,
Daniel Henrique Barboza
,
09:00
[PATCH v11 2/3] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
,
Daniel Henrique Barboza
,
09:00
[PATCH v11 1/3] hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()
,
Daniel Henrique Barboza
,
09:00
[PATCH v11 0/3] Consolidate all kernel init in load_kernel()
,
Daniel Henrique Barboza
,
09:00
Re: [PATCH 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Sunil V L
,
08:24
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Sunil V L
,
08:04
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Gerd Hoffmann
,
07:56
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Andrew Jones
,
07:35
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Philippe Mathieu-Daudé
,
06:18
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Andrea Bolognani
,
05:55
Re: [PATCH 10/10] MAINTAINERS: Add entry for RISC-V ACPI
,
Bin Meng
,
05:33
Re: [PATCH 09/10] hw/riscv/virt.c: Initialize the ACPI tables
,
Bin Meng
,
05:32
Re: [PATCH 08/10] hw/riscv/Kconfig: virt: Enable ACPI config options
,
Bin Meng
,
05:30
Re: [PATCH 07/10] hw/riscv: meson.build: Build virt-acpi-build.c
,
Bin Meng
,
05:26
Re: [PATCH 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Bin Meng
,
05:18
Re: [PATCH 03/10] hw/riscv/virt: Add memmap pointer to RiscVVirtState
,
Bin Meng
,
04:50
Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Bin Meng
,
04:43
Re: [PATCH] hw/riscv: virt: Simplify virt_{get,set}_aclint()
,
Philippe Mathieu-Daudé
,
04:20
[PATCH] hw/riscv: virt: Simplify virt_{get,set}_aclint()
,
Bin Meng
,
03:50
Re: [PATCH 01/10] hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
,
Bin Meng
,
00:50
Question for misaligned exception(load/store/fetch) in qemu
,
Eric Chan
,
00:47
February 05, 2023
Re: [PATCH] target/riscv: fix SBI getchar handler for KVM
,
Alistair Francis
,
19:07
Re: [PATCH v2] target/riscv: fix ctzw behavior
,
Alistair Francis
,
19:03
Re: [PATCH v5 01/14] RISC-V: Adding XTheadCmo ISA extension
,
Alistair Francis
,
18:19
Re: [PATCH] target/riscv: fix SBI getchar handler for KVM
,
Alistair Francis
,
18:17
Re: [PATCH v2] target/riscv: fix ctzw behavior
,
Alistair Francis
,
18:16
Re: [PATCH v10 4/5] riscv: Introduce satp mode hw capabilities
,
Alistair Francis
,
18:12
Re: [PATCH 02/19] hw/qdev: Introduce qdev_prop_set_link()
,
Mark Cave-Ayland
,
17:53
Re: [PATCH 13/19] hw/m68k: Set QDev properties using QDev API
,
Thomas Huth
,
04:14
February 04, 2023
Re: [RFC PATCH 12/19] hw/i386: Set QDev properties using QDev API
,
Bernhard Beschow
,
08:23
Re: [PATCH v10 1/3] hw/riscv: handle 32 bit CPUs kernel_addr in riscv_load_kernel()
,
Alistair Francis
,
07:03
[PATCH v2] target/riscv: fix ctzw behavior
,
Vladimir Isaev
,
03:24
February 03, 2023
Re: [PATCH v10 1/3] hw/riscv: handle 32 bit CPUs kernel_addr in riscv_load_kernel()
,
Daniel Henrique Barboza
,
16:00
Re: [PATCH 00/19] hw: Set QDev properties using QDev API (part 1/3)
,
BALATON Zoltan
,
13:55
Re: [PATCH 00/19] hw: Set QDev properties using QDev API (part 1/3)
,
Philippe Mathieu-Daudé
,
13:12
[PATCH 19/19] hw/sparc: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:11
[PATCH 18/19] hw/rx: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[RFC PATCH 17/19] hw/riscv: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[PATCH 16/19] hw/nios2: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[RFC PATCH 15/19] hw/mips: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[PATCH 14/19] hw/microblaze: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[PATCH 13/19] hw/m68k: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[RFC PATCH 12/19] hw/i386: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[PATCH 11/19] hw/hppa: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[PATCH 10/19] hw/avr: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[PATCH 09/19] hw/virtio: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[PATCH 08/19] hw/usb: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:10
[RFC PATCH 07/19] hw/scsi: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:09
[PATCH 06/19] hw/core/gpio: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:09
[RFC PATCH 05/19] hw/core/numa: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:09
[PATCH 04/19] hw/audio: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:09
[PATCH 03/19] hw/acpi: Set QDev properties using QDev API
,
Philippe Mathieu-Daudé
,
13:09
[PATCH 02/19] hw/qdev: Introduce qdev_prop_set_link()
,
Philippe Mathieu-Daudé
,
13:09
[PATCH 01/19] NOTFORMERGE scripts/coccinelle: Add qom-qdev-prop.cocci
,
Philippe Mathieu-Daudé
,
13:09
[PATCH 00/19] hw: Set QDev properties using QDev API (part 1/3)
,
Philippe Mathieu-Daudé
,
13:09
Re: [PATCH] target/riscv: fix ctzw behavior
,
Richard Henderson
,
11:56
[PATCH] target/riscv: fix ctzw behavior
,
Vladimir Isaev
,
09:02
[PATCH] target/riscv: fix SBI getchar handler for KVM
,
Vladimir Isaev
,
09:02
Re: [PATCH v10 1/3] hw/riscv: handle 32 bit CPUs kernel_addr in riscv_load_kernel()
,
Bin Meng
,
05:45
Re: [PATCH v10 1/3] hw/riscv: handle 32 bit CPUs kernel_addr in riscv_load_kernel()
,
Daniel Henrique Barboza
,
05:32
Re: [PATCH v10 3/5] riscv: Allow user to set the satp mode
,
Frank Chang
,
03:02
Re: [PATCH v10 4/5] riscv: Introduce satp mode hw capabilities
,
Frank Chang
,
02:58
[PATCH v10 5/5] riscv: Correctly set the device-tree entry 'mmu-type'
,
Alexandre Ghiti
,
01:03
[PATCH v10 4/5] riscv: Introduce satp mode hw capabilities
,
Alexandre Ghiti
,
01:02
[PATCH v10 3/5] riscv: Allow user to set the satp mode
,
Alexandre Ghiti
,
01:01
[PATCH v10 2/5] riscv: Change type of valid_vm_1_10_[32|64] to bool
,
Alexandre Ghiti
,
01:00
[PATCH v10 1/5] riscv: Pass Object to register_cpu_props instead of DeviceState
,
Alexandre Ghiti
,
00:59
[PATCH v10 0/5] riscv: Allow user to set the satp mode
,
Alexandre Ghiti
,
00:58
Re: [PATCH v10 1/3] hw/riscv: handle 32 bit CPUs kernel_addr in riscv_load_kernel()
,
Bin Meng
,
00:39
Re: [PATCH v5 01/14] RISC-V: Adding XTheadCmo ISA extension
,
Alistair Francis
,
00:15
Re: [PATCH v10 1/3] hw/riscv: handle 32 bit CPUs kernel_addr in riscv_load_kernel()
,
Alistair Francis
,
00:10
February 02, 2023
[PATCH] target/riscv: Convert epmp from feature to ratified smepmp extension
,
Himanshu Chauhan
,
23:24
QEMU SIG
,
Alistair Francis
,
19:05
Re: [PATCH v10 0/3] hw/riscv: handle kernel_entry high bits with 32bit CPUs
,
Daniel Henrique Barboza
,
13:50
Re: [PATCH v10 0/3] hw/riscv: handle kernel_entry high bits with 32bit CPUs
,
Conor Dooley
,
13:47
Re: [PATCH v10 0/3] hw/riscv: handle kernel_entry high bits with 32bit CPUs
,
Daniel Henrique Barboza
,
13:37
Re: [PATCH v10 0/3] hw/riscv: handle kernel_entry high bits with 32bit CPUs
,
Conor Dooley
,
12:25
Re: [PATCH v6 07/20] hw/cxl: Clean up includes
,
Jonathan Cameron
,
10:52
[PATCH v10 3/3] hw/riscv/boot.c: make riscv_load_initrd() static
,
Daniel Henrique Barboza
,
08:58
[PATCH v10 2/3] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
,
Daniel Henrique Barboza
,
08:58
[PATCH v10 1/3] hw/riscv: handle 32 bit CPUs kernel_addr in riscv_load_kernel()
,
Daniel Henrique Barboza
,
08:58
[PATCH v10 0/3] hw/riscv: handle kernel_entry high bits with 32bit CPUs
,
Daniel Henrique Barboza
,
08:58
[PATCH v10 1/3] hw/riscv: handle 32 bit CPUs kernel_addr in riscv_load_kernel()
,
Daniel Henrique Barboza
,
08:53
[PATCH v10 2/3] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
,
Daniel Henrique Barboza
,
08:53
[PATCH v10 3/3] hw/riscv/boot.c: make riscv_load_initrd() static
,
Daniel Henrique Barboza
,
08:53
[PATCH v10 0/3]
,
Daniel Henrique Barboza
,
08:53
[PATCH v6 02/20] scripts/clean-includes: Don't claim duplicate headers found when not
,
Markus Armbruster
,
08:39
[PATCH v6 14/20] riscv: Clean up includes
,
Markus Armbruster
,
08:39
[PATCH v6 20/20] Drop duplicate #include
,
Markus Armbruster
,
08:39
[PATCH v6 15/20] block: Clean up includes
,
Markus Armbruster
,
08:39
[PATCH v6 06/20] crypto: Clean up includes
,
Markus Armbruster
,
08:39
[PATCH v6 19/20] 9p: Drop superfluous include of linux/limits.h
,
Markus Armbruster
,
08:39
[PATCH v6 13/20] target/hexagon: Clean up includes
,
Markus Armbruster
,
08:39
[PATCH v6 17/20] Fix non-first inclusions of qemu/osdep.h
,
Markus Armbruster
,
08:39
[PATCH v6 12/20] net: Clean up includes
,
Markus Armbruster
,
08:39
[PATCH v6 07/20] hw/cxl: Clean up includes
,
Markus Armbruster
,
08:39
[PATCH v6 04/20] scripts/clean-includes: Improve --git commit message
,
Markus Armbruster
,
08:39
[PATCH v6 10/20] qga: Clean up includes
,
Markus Armbruster
,
08:39
[PATCH v6 01/20] scripts/clean-includes: Fully skip / ignore files
,
Markus Armbruster
,
08:38
[PATCH v6 16/20] accel: Clean up includes
,
Markus Armbruster
,
08:38
[PATCH v6 03/20] scripts/clean-includes: Skip symbolic links
,
Markus Armbruster
,
08:38
[PATCH v6 05/20] bsd-user: Clean up includes
,
Markus Armbruster
,
08:38
[PATCH v6 08/20] hw/input: Clean up includes
,
Markus Armbruster
,
08:38
[PATCH v6 18/20] Don't include headers already included by qemu/osdep.h
,
Markus Armbruster
,
08:38
[PATCH v6 00/20] Clean up includes
,
Markus Armbruster
,
08:38
[PATCH v6 11/20] migration: Clean up includes
,
Markus Armbruster
,
08:38
[PATCH v6 09/20] hw/tricore: Clean up includes
,
Markus Armbruster
,
08:38
Re: [PATCH v9 4/5] riscv: Introduce satp mode hw capabilities
,
Frank Chang
,
08:04
Re: [PATCH v9 4/5] riscv: Introduce satp mode hw capabilities
,
Alexandre Ghiti
,
08:01
Re: [PATCH v5 04/20] scripts/clean-includes: Improve --git commit message
,
Juan Quintela
,
05:55
Re: [PATCH v5 04/20] scripts/clean-includes: Improve --git commit message
,
Markus Armbruster
,
04:01
February 01, 2023
[PATCH 10/10] MAINTAINERS: Add entry for RISC-V ACPI
,
Sunil V L
,
23:53
[PATCH 09/10] hw/riscv/virt.c: Initialize the ACPI tables
,
Sunil V L
,
23:53
[PATCH 07/10] hw/riscv: meson.build: Build virt-acpi-build.c
,
Sunil V L
,
23:53
[PATCH 08/10] hw/riscv/Kconfig: virt: Enable ACPI config options
,
Sunil V L
,
23:53
[PATCH 06/10] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table
,
Sunil V L
,
23:52
[PATCH 05/10] hw/riscv/virt: virt-acpi-build.c: Add RINTC in MADT
,
Sunil V L
,
23:52
[PATCH 04/10] hw/riscv/virt: virt-acpi-build.c: Add basic ACPI tables
,
Sunil V L
,
23:52
[PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI
,
Sunil V L
,
23:52
[PATCH 01/10] hw/riscv/virt: Add OEM_ID and OEM_TABLE_ID fields
,
Sunil V L
,
23:52
[PATCH 03/10] hw/riscv/virt: Add memmap pointer to RiscVVirtState
,
Sunil V L
,
23:52
[PATCH 00/10] Add basic ACPI support for risc-v virt
,
Sunil V L
,
23:52
Re: [PATCH v5 0/3] riscv_load_fdt() semantics change
,
Alistair Francis
,
21:03
Re: [PATCH v5 3/3] hw/riscv: change riscv_compute_fdt_addr() semantics
,
Alistair Francis
,
20:10
Re: [PATCH v9 3/5] riscv: Allow user to set the satp mode
,
Alistair Francis
,
19:49
Re: [PATCH v2] target/riscv: set tval for triggered watchpoints
,
Alistair Francis
,
19:42
Re: [PATCH v2] target/riscv: set tval for triggered watchpoints
,
Alistair Francis
,
19:32
Re: [PATCH v9 1/3] hw/riscv: clear kernel_entry higher bits from load_elf_ram_sym()
,
Alistair Francis
,
19:29
Re: [PATCH] hw/riscv: boot: Don't use CSRs if they are disabled
,
Alistair Francis
,
19:26
Re: [PATCH: fix for virt instr exception] target/riscv: fix for virtual instr exception
,
Deepak Gupta
,
15:51
[PATCH v5 2/3] hw/riscv: split fdt address calculation from fdt load
,
Daniel Henrique Barboza
,
12:12
[PATCH v5 3/3] hw/riscv: change riscv_compute_fdt_addr() semantics
,
Daniel Henrique Barboza
,
12:12
[PATCH v5 1/3] hw/riscv/boot.c: calculate fdt size after fdt_pack()
,
Daniel Henrique Barboza
,
12:12
[PATCH v5 0/3] riscv_load_fdt() semantics change
,
Daniel Henrique Barboza
,
12:12
Re: [PATCH v9 4/5] riscv: Introduce satp mode hw capabilities
,
Frank Chang
,
10:50
Re: [PATCH v5 04/20] scripts/clean-includes: Improve --git commit message
,
Juan Quintela
,
09:54
Re: [PATCH v9 1/3] hw/riscv: clear kernel_entry higher bits from load_elf_ram_sym()
,
Daniel Henrique Barboza
,
08:48
Re: [PATCH v5 04/20] scripts/clean-includes: Improve --git commit message
,
Markus Armbruster
,
08:44
Re: [PATCH v9 5/5] riscv: Correctly set the device-tree entry 'mmu-type'
,
Frank Chang
,
08:25
Re: [PATCH v9 2/5] riscv: Change type of valid_vm_1_10_[32|64] to bool
,
Frank Chang
,
08:23
Re: [PATCH v5 04/20] scripts/clean-includes: Improve --git commit message
,
Juan Quintela
,
08:14
Re: [PATCH v5 04/20] scripts/clean-includes: Improve --git commit message
,
Markus Armbruster
,
07:50
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