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[PATCH 50/70] target/s390x: Split out gen_ri2
From: |
Richard Henderson |
Subject: |
[PATCH 50/70] target/s390x: Split out gen_ri2 |
Date: |
Sun, 26 Feb 2023 19:42:13 -1000 |
Use tcg_constant_i64. Adjust in2_mri2_* to allocate a new
temporary for the output, using gen_ri2 for the address.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/s390x/tcg/translate.c | 23 ++++++++++++++---------
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 9974162527..7969051ce9 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -5745,9 +5745,14 @@ static void in2_a2(DisasContext *s, DisasOps *o)
}
#define SPEC_in2_a2 0
+static TCGv gen_ri2(DisasContext *s)
+{
+ return tcg_constant_i64(s->base.pc_next + (int64_t)get_field(s, i2) * 2);
+}
+
static void in2_ri2(DisasContext *s, DisasOps *o)
{
- o->in2 = tcg_const_i64(s->base.pc_next + (int64_t)get_field(s, i2) * 2);
+ o->in2 = gen_ri2(s);
}
#define SPEC_in2_ri2 0
@@ -5835,29 +5840,29 @@ static void in2_m2_64a(DisasContext *s, DisasOps *o)
static void in2_mri2_16u(DisasContext *s, DisasOps *o)
{
- in2_ri2(s, o);
- tcg_gen_qemu_ld16u(o->in2, o->in2, get_mem_index(s));
+ o->in2 = tcg_temp_new_i64();
+ tcg_gen_qemu_ld16u(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_16u 0
static void in2_mri2_32s(DisasContext *s, DisasOps *o)
{
- in2_ri2(s, o);
- tcg_gen_qemu_ld32s(o->in2, o->in2, get_mem_index(s));
+ o->in2 = tcg_temp_new_i64();
+ tcg_gen_qemu_ld32s(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_32s 0
static void in2_mri2_32u(DisasContext *s, DisasOps *o)
{
- in2_ri2(s, o);
- tcg_gen_qemu_ld32u(o->in2, o->in2, get_mem_index(s));
+ o->in2 = tcg_temp_new_i64();
+ tcg_gen_qemu_ld32u(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_32u 0
static void in2_mri2_64(DisasContext *s, DisasOps *o)
{
- in2_ri2(s, o);
- tcg_gen_qemu_ld64(o->in2, o->in2, get_mem_index(s));
+ o->in2 = tcg_temp_new_i64();
+ tcg_gen_qemu_ld64(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_64 0
--
2.34.1
- [PATCH 42/70] target/ppc: Rewrite trans_ADDG6S, (continued)
- [PATCH 42/70] target/ppc: Rewrite trans_ADDG6S, Richard Henderson, 2023/02/27
- [PATCH 43/70] target/ppc: Fix gen_tlbsx_booke206, Richard Henderson, 2023/02/27
- [PATCH 45/70] target/riscv: Avoid tcg_const_*, Richard Henderson, 2023/02/27
- [PATCH 47/70] target/rx: Use cpu_psw_z as temp in flags computation, Richard Henderson, 2023/02/27
- [PATCH 48/70] target/rx: Avoid tcg_const_i32 when new temp needed, Richard Henderson, 2023/02/27
- [PATCH 46/70] target/rx: Use tcg_gen_abs_i32, Richard Henderson, 2023/02/27
- [PATCH 44/70] target/ppc: Avoid tcg_const_* in translate.c, Richard Henderson, 2023/02/27
- [PATCH 51/70] target/s390x: Avoid tcg_const_i64, Richard Henderson, 2023/02/27
- [PATCH 49/70] target/rx: Avoid tcg_const_i32, Richard Henderson, 2023/02/27
- [PATCH 50/70] target/s390x: Split out gen_ri2,
Richard Henderson <=
- [PATCH 53/70] target/sh4: Avoid tcg_const_i32, Richard Henderson, 2023/02/27
- [PATCH 52/70] target/sh4: Avoid tcg_const_i32 for TAS.B, Richard Henderson, 2023/02/27
- [PATCH 54/70] tcg/sparc: Avoid tcg_const_tl in gen_edge, Richard Henderson, 2023/02/27
- [PATCH 55/70] target/sparc: Avoid tcg_const_{tl,i32}, Richard Henderson, 2023/02/27
- [PATCH 58/70] target/tricore: Use min/max for saturate, Richard Henderson, 2023/02/27
- [PATCH 63/70] target/xtensa: Tidy translate_clamps, Richard Henderson, 2023/02/27
- [PATCH 65/70] target/xtensa: Use tcg_gen_subfi_i32 in translate_sll, Richard Henderson, 2023/02/27