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Re: [PATCH] target/riscv: rvzicbo: Fixup CBO extension register calculat


From: Richard Henderson
Subject: Re: [PATCH] target/riscv: rvzicbo: Fixup CBO extension register calculation
Date: Tue, 14 May 2024 09:09:02 +0200
User-agent: Mozilla Thunderbird

On 5/14/24 04:39, Alistair Francis wrote:
When running the instruction

```
     cbo.flush 0(x0)
```

QEMU would segfault.

The issue was in cpu_gpr[a->rs1] as QEMU does not have cpu_gpr[0]
allocated.

In order to fix this let's use the existing get_address()
helper. This also has the benefit of performing pointer mask
calculations on the address specified in rs1.

The pointer masking specificiation specifically states:

"""
Cache Management Operations: All instructions in Zicbom, Zicbop and Zicboz
"""

So this is the correct behaviour and we previously have been incorrectly
not masking the address.

Signed-off-by: Alistair Francis<alistair.francis@wdc.com>
Reported-by: Fabian Thomas<fabian.thomas@cispa.de>
Fixes: e05da09b7cfd ("target/riscv: implement Zicbom extension")
---
  target/riscv/insn_trans/trans_rvzicbo.c.inc | 16 ++++++++++++----
  1 file changed, 12 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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