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[PATCH 5/6] target/riscv: Enable zabha for max cpu
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From: |
LIU Zhiwei |
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Subject: |
[PATCH 5/6] target/riscv: Enable zabha for max cpu |
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Date: |
Thu, 23 May 2024 20:40:44 +0800 |
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 21d4e36405..9ec03a1edc 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -118,6 +118,7 @@ const RISCVIsaExtData isa_edata_arr[] = {
ISA_EXT_DATA_ENTRY(zaamo, PRIV_VERSION_1_12_0, ext_zaamo),
ISA_EXT_DATA_ENTRY(zacas, PRIV_VERSION_1_12_0, ext_zacas),
ISA_EXT_DATA_ENTRY(zama16b, PRIV_VERSION_1_12_0, ext_zama16b),
+ ISA_EXT_DATA_ENTRY(zabha, PRIV_VERSION_1_12_0, ext_zabha),
ISA_EXT_DATA_ENTRY(zalrsc, PRIV_VERSION_1_12_0, ext_zalrsc),
ISA_EXT_DATA_ENTRY(zawrs, PRIV_VERSION_1_12_0, ext_zawrs),
ISA_EXT_DATA_ENTRY(zfa, PRIV_VERSION_1_12_0, ext_zfa),
@@ -1470,6 +1471,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
MULTI_EXT_CFG_BOOL("zcmop", ext_zcmop, false),
MULTI_EXT_CFG_BOOL("zacas", ext_zacas, false),
MULTI_EXT_CFG_BOOL("zama16b", ext_zama16b, false),
+ MULTI_EXT_CFG_BOOL("zabha", ext_zabha, false),
MULTI_EXT_CFG_BOOL("zaamo", ext_zaamo, false),
MULTI_EXT_CFG_BOOL("zalrsc", ext_zalrsc, false),
MULTI_EXT_CFG_BOOL("zawrs", ext_zawrs, true),
--
2.25.1
- [PATCH 0/6] target/riscv: Support Zabha extension, LIU Zhiwei, 2024/05/23
- [PATCH 1/6] target/riscv: Move gen_amo before implement Zabha, LIU Zhiwei, 2024/05/23
- [PATCH 2/6] target/riscv: Add AMO instructions for Zabha, LIU Zhiwei, 2024/05/23
- [PATCH 3/6] target/riscv: Move gen_cmpxchg before adding amocas.[b|h], LIU Zhiwei, 2024/05/23
- [PATCH 4/6] target/riscv: Add amocas.[b|h] for Zabha, LIU Zhiwei, 2024/05/23
- [PATCH 5/6] target/riscv: Enable zabha for max cpu,
LIU Zhiwei <=
- [PATCH 6/6] disas/riscv: Support zabha disassemble, LIU Zhiwei, 2024/05/23
- Re: [PATCH 0/6] target/riscv: Support Zabha extension, Daniel Henrique Barboza, 2024/05/24