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Re: [PATCH 1/6] target/riscv: Move gen_amo before implement Zabha
From: |
Alistair Francis |
Subject: |
Re: [PATCH 1/6] target/riscv: Move gen_amo before implement Zabha |
Date: |
Tue, 4 Jun 2024 12:25:44 +1000 |
On Thu, May 23, 2024 at 10:43 PM LIU Zhiwei
<zhiwei_liu@linux.alibaba.com> wrote:
>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/insn_trans/trans_rva.c.inc | 21 ---------------------
> target/riscv/translate.c | 21 +++++++++++++++++++++
> 2 files changed, 21 insertions(+), 21 deletions(-)
>
> diff --git a/target/riscv/insn_trans/trans_rva.c.inc
> b/target/riscv/insn_trans/trans_rva.c.inc
> index eb080baddd..39bbf60f3c 100644
> --- a/target/riscv/insn_trans/trans_rva.c.inc
> +++ b/target/riscv/insn_trans/trans_rva.c.inc
> @@ -96,27 +96,6 @@ static bool gen_sc(DisasContext *ctx, arg_atomic *a, MemOp
> mop)
> return true;
> }
>
> -static bool gen_amo(DisasContext *ctx, arg_atomic *a,
> - void(*func)(TCGv, TCGv, TCGv, TCGArg, MemOp),
> - MemOp mop)
> -{
> - TCGv dest = dest_gpr(ctx, a->rd);
> - TCGv src1, src2 = get_gpr(ctx, a->rs2, EXT_NONE);
> -
> - if (ctx->cfg_ptr->ext_zama16b) {
> - mop |= MO_ATOM_WITHIN16;
> - } else {
> - mop |= MO_ALIGN;
> - }
> -
> - decode_save_opc(ctx);
> - src1 = get_address(ctx, a->rs1, 0);
> - func(dest, src1, src2, ctx->mem_idx, mop);
> -
> - gen_set_gpr(ctx, a->rd, dest);
> - return true;
> -}
> -
> static bool trans_lr_w(DisasContext *ctx, arg_lr_w *a)
> {
> REQUIRE_A_OR_ZALRSC(ctx);
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 51dfb03685..b160bcbfe0 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -1075,6 +1075,27 @@ static bool gen_unary_per_ol(DisasContext *ctx, arg_r2
> *a, DisasExtend ext,
> return gen_unary(ctx, a, ext, f_tl);
> }
>
> +static bool gen_amo(DisasContext *ctx, arg_atomic *a,
> + void(*func)(TCGv, TCGv, TCGv, TCGArg, MemOp),
> + MemOp mop)
> +{
> + TCGv dest = dest_gpr(ctx, a->rd);
> + TCGv src1, src2 = get_gpr(ctx, a->rs2, EXT_NONE);
> +
> + if (ctx->cfg_ptr->ext_zama16b) {
> + mop |= MO_ATOM_WITHIN16;
> + } else {
> + mop |= MO_ALIGN;
> + }
> +
> + decode_save_opc(ctx);
> + src1 = get_address(ctx, a->rs1, 0);
> + func(dest, src1, src2, ctx->mem_idx, mop);
> +
> + gen_set_gpr(ctx, a->rd, dest);
> + return true;
> +}
> +
> static uint32_t opcode_at(DisasContextBase *dcbase, target_ulong pc)
> {
> DisasContext *ctx = container_of(dcbase, DisasContext, base);
> --
> 2.25.1
>
>
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