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[PATCH v11 09/20] target/riscv: Expose zicfilp extension as a cpu proper
From: |
Deepak Gupta |
Subject: |
[PATCH v11 09/20] target/riscv: Expose zicfilp extension as a cpu property |
Date: |
Wed, 28 Aug 2024 10:47:27 -0700 |
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 55754cb374..c9aeffee4e 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1481,6 +1481,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
/* Defaults for standard extensions */
MULTI_EXT_CFG_BOOL("sscofpmf", ext_sscofpmf, false),
MULTI_EXT_CFG_BOOL("zifencei", ext_zifencei, true),
+ MULTI_EXT_CFG_BOOL("zicfilp", ext_zicfilp, false),
MULTI_EXT_CFG_BOOL("zicsr", ext_zicsr, true),
MULTI_EXT_CFG_BOOL("zihintntl", ext_zihintntl, true),
MULTI_EXT_CFG_BOOL("zihintpause", ext_zihintpause, true),
--
2.44.0
- [PATCH v11 00/20] riscv support for control flow integrity extensions, Deepak Gupta, 2024/08/28
- [PATCH v11 02/20] target/riscv: Add zicfilp extension, Deepak Gupta, 2024/08/28
- [PATCH v11 01/20] target/riscv: expose *envcfg csr and priv to qemu-user as well, Deepak Gupta, 2024/08/28
- [PATCH v11 03/20] target/riscv: Introduce elp state and enabling controls for zicfilp, Deepak Gupta, 2024/08/28
- [PATCH v11 04/20] target/riscv: save and restore elp state on priv transitions, Deepak Gupta, 2024/08/28
- [PATCH v11 05/20] target/riscv: additional code information for sw check, Deepak Gupta, 2024/08/28
- [PATCH v11 06/20] target/riscv: tracking indirect branches (fcfi) for zicfilp, Deepak Gupta, 2024/08/28
- [PATCH v11 10/20] target/riscv: Add zicfiss extension, Deepak Gupta, 2024/08/28
- [PATCH v11 11/20] target/riscv: introduce ssp and enabling controls for zicfiss, Deepak Gupta, 2024/08/28
- [PATCH v11 09/20] target/riscv: Expose zicfilp extension as a cpu property,
Deepak Gupta <=
- [PATCH v11 08/20] disas/riscv: enable `lpad` disassembly, Deepak Gupta, 2024/08/28
- [PATCH v11 14/20] target/riscv: AMO operations always raise store/AMO fault, Deepak Gupta, 2024/08/28
- [PATCH v11 12/20] target/riscv: tb flag for shadow stack instructions, Deepak Gupta, 2024/08/28
- [PATCH v11 07/20] target/riscv: zicfilp `lpad` impl and branch tracking, Deepak Gupta, 2024/08/28
- [PATCH v11 17/20] target/riscv: compressed encodings for sspush and sspopchk, Deepak Gupta, 2024/08/28
- [PATCH v11 18/20] disas/riscv: enable disassembly for zicfiss instructions, Deepak Gupta, 2024/08/28