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qemu-riscv (date)
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Last Modified: Sat Aug 31 2024 19:59:26 -0400
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August 31, 2024
Re: [PATCH v2 01/14] tcg/op-gvec: Fix iteration step in 32-bit operation
,
Richard Henderson
,
19:59
August 30, 2024
Re: [PATCH] target/riscv: Stop timer with infinite timecmp
,
Vladimir Isaev
,
13:47
[PATCH v13 19/20] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
12:48
[PATCH v13 20/20] target/riscv: Expose zicfiss extension as a cpu property
,
Deepak Gupta
,
12:48
[PATCH v13 17/20] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
12:48
[PATCH v13 18/20] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
12:48
[PATCH v13 15/20] target/riscv: update `decode_save_opc` to store extra word2
,
Deepak Gupta
,
12:48
[PATCH v13 16/20] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
12:48
[PATCH v13 13/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
12:48
[PATCH v13 14/20] target/riscv: AMO operations always raise store/AMO fault
,
Deepak Gupta
,
12:48
[PATCH v13 12/20] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
12:48
[PATCH v13 11/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
12:48
[PATCH v13 10/20] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
12:48
[PATCH v13 09/20] target/riscv: Expose zicfilp extension as a cpu property
,
Deepak Gupta
,
12:48
[PATCH v13 07/20] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
12:48
[PATCH v13 08/20] disas/riscv: enable `lpad` disassembly
,
Deepak Gupta
,
12:48
[PATCH v13 06/20] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
12:48
[PATCH v13 05/20] target/riscv: additional code information for sw check
,
Deepak Gupta
,
12:48
[PATCH v13 04/20] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
12:48
[PATCH v13 03/20] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
12:48
[PATCH v13 01/20] target/riscv: expose *envcfg csr and priv to qemu-user as well
,
Deepak Gupta
,
12:48
[PATCH v13 02/20] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
12:48
[PATCH v13 00/20] riscv support for control flow integrity extensions
,
Deepak Gupta
,
12:48
Re: [PATCH v12 11/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
12:30
tests/avocado/riscv_opensbi.py does not work reliable
,
Thomas Huth
,
11:34
Re: [PATCH] target/riscv: Stop timer with infinite timecmp
,
Andrew Jones
,
10:50
Re: [PATCH v5 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden reference for RISC-V
,
Sunil V L
,
10:04
Re: [PATCH] target/riscv: Stop timer with infinite timecmp
,
Vladimir Isaev
,
07:05
[PATCH v2 14/14] tcg/riscv: Enable native vector support for TCG host
,
LIU Zhiwei
,
02:24
[PATCH v2 13/14] tcg/riscv: Implement vector roti/v/x shi ops
,
LIU Zhiwei
,
02:23
[PATCH v2 12/14] tcg/riscv: Implement vector shs/v ops
,
LIU Zhiwei
,
02:23
[PATCH v2 11/14] tcg/riscv: Implement vector min/max ops
,
LIU Zhiwei
,
02:22
[PATCH v2 10/14] tcg/riscv: Implement vector sat/mul ops
,
LIU Zhiwei
,
02:22
[PATCH v2 09/14] tcg/riscv: Implement vector neg ops
,
LIU Zhiwei
,
02:21
[PATCH v2 08/14] tcg/riscv: Implement vector cmp ops
,
LIU Zhiwei
,
02:21
[PATCH v2 07/14] tcg/riscv: Add support for basic vector opcodes
,
LIU Zhiwei
,
02:20
[PATCH v2 06/14] tcg/riscv: Implement vector mov/dup{m/i}
,
LIU Zhiwei
,
02:20
[PATCH v2 05/14] tcg/riscv: Implement vector load/store
,
LIU Zhiwei
,
02:19
[PATCH v2 04/14] tcg/riscv: Add riscv vset{i}vli support
,
LIU Zhiwei
,
02:19
[PATCH v2 03/14] tcg/riscv: Add basic support for vector
,
LIU Zhiwei
,
02:18
[PATCH v2 02/14] util: Add RISC-V vector extension probe in cpuinfo
,
LIU Zhiwei
,
02:18
[PATCH v2 01/14] tcg/op-gvec: Fix iteration step in 32-bit operation
,
LIU Zhiwei
,
02:17
[PATCH v2 00/14] tcg/riscv: Add support for vector
,
LIU Zhiwei
,
02:17
Re: [PATCH v12 11/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
01:56
Re: [PATCH v12 11/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Richard Henderson
,
01:20
August 29, 2024
Re: [PATCH v12 04/20] target/riscv: save and restore elp state on priv transitions
,
Richard Henderson
,
22:13
Re: [PATCH v12 01/20] target/riscv: expose *envcfg csr and priv to qemu-user as well
,
Richard Henderson
,
22:10
Re: [PATCH] target/riscv: Stop timer with infinite timecmp
,
Alistair Francis
,
19:46
Re: [PATCH v5 4/5] target/riscv: Add Smrnmi mnret instruction.
,
Alistair Francis
,
19:42
[PATCH v12 19/20] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
19:35
[PATCH v12 20/20] target/riscv: Expose zicfiss extension as a cpu property
,
Deepak Gupta
,
19:35
[PATCH v12 17/20] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
19:35
[PATCH v12 16/20] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
19:35
[PATCH v12 18/20] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
19:35
[PATCH v12 15/20] target/riscv: update `decode_save_opc` to store extra word2
,
Deepak Gupta
,
19:35
[PATCH v12 14/20] target/riscv: AMO operations always raise store/AMO fault
,
Deepak Gupta
,
19:35
[PATCH v12 12/20] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
19:35
[PATCH v12 10/20] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
19:34
[PATCH v12 09/20] target/riscv: Expose zicfilp extension as a cpu property
,
Deepak Gupta
,
19:34
[PATCH v12 08/20] disas/riscv: enable `lpad` disassembly
,
Deepak Gupta
,
19:34
[PATCH v12 13/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
19:34
[PATCH v12 11/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
19:34
[PATCH v12 05/20] target/riscv: additional code information for sw check
,
Deepak Gupta
,
19:34
[PATCH v12 07/20] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
19:34
[PATCH v12 06/20] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
19:34
[PATCH v12 03/20] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
19:34
[PATCH v12 04/20] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
19:34
[PATCH v12 02/20] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
19:34
[PATCH v12 01/20] target/riscv: expose *envcfg csr and priv to qemu-user as well
,
Deepak Gupta
,
19:34
[PATCH v12 00/20] riscv support for control flow integrity extensions
,
Deepak Gupta
,
19:34
Re: [PATCH v5 4/5] target/riscv: Add Smrnmi mnret instruction.
,
Tommy Wu
,
12:12
Re: [PATCH v5 2/5] target/riscv: Handle Smrnmi interrupt and exception.
,
Tommy Wu
,
11:17
[PATCH] target/riscv: Stop timer with infinite timecmp
,
Andrew Jones
,
04:40
August 28, 2024
[PATCH v5 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden reference for RISC-V
,
Sia Jee Heng
,
22:00
[PATCH v5 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
Sia Jee Heng
,
21:59
[PATCH v5 1/3] qtest: allow SPCR acpi table changes
,
Sia Jee Heng
,
21:59
[PATCH v5 0/3] Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
Sia Jee Heng
,
21:59
Re: [PATCH v11 12/20] target/riscv: tb flag for shadow stack instructions
,
Richard Henderson
,
21:35
Re: [PATCH v11 13/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
20:17
Re: [PATCH v11 16/20] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
20:16
Re: [PATCH v11 16/20] target/riscv: implement zicfiss instructions
,
Alistair Francis
,
20:07
Re: [PATCH v11 20/20] target/riscv: Expose zicfiss extension as a cpu property
,
Alistair Francis
,
20:07
Re: [PATCH v11 19/20] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Alistair Francis
,
20:06
Re: [PATCH v11 16/20] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
20:06
Re: [PATCH v11 18/20] disas/riscv: enable disassembly for zicfiss instructions
,
Alistair Francis
,
20:04
Re: [PATCH v11 17/20] target/riscv: compressed encodings for sspush and sspopchk
,
Alistair Francis
,
20:04
Re: [PATCH v11 13/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Alistair Francis
,
20:03
Re: [PATCH v11 16/20] target/riscv: implement zicfiss instructions
,
Alistair Francis
,
20:02
Re: [PATCH v11 13/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
19:45
Re: [PATCH v11 15/20] target/riscv: update `decode_save_opc` to store extra word2
,
Alistair Francis
,
19:36
Re: [PATCH v1 15/15] tcg/riscv: Enable vector TCG host-native
,
Richard Henderson
,
19:35
Re: [PATCH v11 14/20] target/riscv: AMO operations always raise store/AMO fault
,
Alistair Francis
,
19:33
Re: [PATCH v11 13/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Alistair Francis
,
19:30
Re: [PATCH v11 11/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Alistair Francis
,
19:17
Re: [PATCH v11 00/20] riscv support for control flow integrity extensions
,
Deepak Gupta
,
13:50
[PATCH v11 15/20] target/riscv: update `decode_save_opc` to store extra word2
,
Deepak Gupta
,
13:48
[PATCH v11 20/20] target/riscv: Expose zicfiss extension as a cpu property
,
Deepak Gupta
,
13:48
[PATCH v11 19/20] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
13:48
[PATCH v11 16/20] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
13:48
[PATCH v11 13/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
13:48
[PATCH v11 18/20] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
13:48
[PATCH v11 17/20] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
13:48
[PATCH v11 07/20] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
13:48
[PATCH v11 12/20] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
13:48
[PATCH v11 14/20] target/riscv: AMO operations always raise store/AMO fault
,
Deepak Gupta
,
13:48
[PATCH v11 08/20] disas/riscv: enable `lpad` disassembly
,
Deepak Gupta
,
13:48
[PATCH v11 09/20] target/riscv: Expose zicfilp extension as a cpu property
,
Deepak Gupta
,
13:48
[PATCH v11 11/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
13:48
[PATCH v11 10/20] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
13:48
[PATCH v11 06/20] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
13:48
[PATCH v11 05/20] target/riscv: additional code information for sw check
,
Deepak Gupta
,
13:48
[PATCH v11 04/20] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
13:48
[PATCH v11 03/20] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
13:48
[PATCH v11 01/20] target/riscv: expose *envcfg csr and priv to qemu-user as well
,
Deepak Gupta
,
13:47
[PATCH v11 02/20] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
13:47
[PATCH v11 00/20] riscv support for control flow integrity extensions
,
Deepak Gupta
,
13:47
Re: [PATCH v10 02/21] linux-user/riscv: set priv for qemu-user and defaults for *envcfg
,
Richard Henderson
,
07:37
[PATCH v3] target: riscv: Add Svvptc extension support
,
Alexandre Ghiti
,
04:37
August 27, 2024
Re: [PATCH v10 02/21] linux-user/riscv: set priv for qemu-user and defaults for *envcfg
,
Deepak Gupta
,
20:16
Re: [PATCH v10 00/21] riscv support for control flow integrity extensions
,
Alistair Francis
,
20:11
Re: [PATCH v10 02/21] linux-user/riscv: set priv for qemu-user and defaults for *envcfg
,
Alistair Francis
,
20:11
Re: [PATCH v10 01/21] target/riscv: expose *envcfg csr and priv to qemu-user as well
,
Alistair Francis
,
20:05
Re: [PATCH v10 00/21] riscv support for control flow integrity extensions
,
Deepak Gupta
,
20:05
Re: [PATCH v10 00/21] riscv support for control flow integrity extensions
,
Alistair Francis
,
20:03
Re: [PATCH v10 10/21] target/riscv: Expose zicfilp extension as a cpu property
,
Alistair Francis
,
20:02
Re: [PATCH v10 11/21] target/riscv: Add zicfiss extension
,
Alistair Francis
,
20:01
Re: [PATCH v10 03/21] target/riscv: Add zicfilp extension
,
Alistair Francis
,
20:00
Re: [PATCH v10 00/21] riscv support for control flow integrity extensions
,
Deepak Gupta
,
19:22
[PATCH v10 17/21] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
19:19
[PATCH v10 20/21] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
19:19
[PATCH v10 19/21] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
19:19
[PATCH v10 14/21] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
19:19
[PATCH v10 12/21] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
19:19
[PATCH v10 21/21] target/riscv: Expose zicfiss extension as a cpu property
,
Deepak Gupta
,
19:19
[PATCH v10 13/21] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
19:19
[PATCH v10 15/21] target/riscv: AMO operations always raise store/AMO fault
,
Deepak Gupta
,
19:19
[PATCH v10 16/21] target/riscv: update `decode_save_opc` to store extra word2
,
Deepak Gupta
,
19:19
[PATCH v10 18/21] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
19:19
[PATCH v10 11/21] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
19:19
[PATCH v10 08/21] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
19:19
[PATCH v10 10/21] target/riscv: Expose zicfilp extension as a cpu property
,
Deepak Gupta
,
19:19
[PATCH v10 06/21] target/riscv: additional code information for sw check
,
Deepak Gupta
,
19:19
[PATCH v10 05/21] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
19:19
[PATCH v10 09/21] disas/riscv: enable `lpad` disassembly
,
Deepak Gupta
,
19:19
[PATCH v10 07/21] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
19:19
[PATCH v10 02/21] linux-user/riscv: set priv for qemu-user and defaults for *envcfg
,
Deepak Gupta
,
19:19
[PATCH v10 04/21] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
19:19
[PATCH v10 01/21] target/riscv: expose *envcfg csr and priv to qemu-user as well
,
Deepak Gupta
,
19:19
[PATCH v10 03/21] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
19:19
[PATCH v10 00/21] riscv support for control flow integrity extensions
,
Deepak Gupta
,
19:19
Re: [PATCH v9 11/17] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
19:06
Re: [PATCH v4 03/14] hw/riscv: add RISC-V IOMMU base emulation
,
Tomasz Jeznach
,
12:04
Re: [PATCH for-9.2 v6 08/12] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)
,
Daniel Henrique Barboza
,
07:56
Re: [PATCH v2 3/6] target/riscv: Add support for Control Transfer Records extension CSRs.
,
Frank Chang
,
05:28
Re: [PATCH v1 15/15] tcg/riscv: Enable vector TCG host-native
,
LIU Zhiwei
,
04:32
Re: [PATCH v1 14/15] tcg/riscv: Implement vector roti/v/x shi ops
,
LIU Zhiwei
,
03:57
Re: [PATCH v1 10/15] tcg/riscv: Implement vector not/neg ops
,
LIU Zhiwei
,
03:56
Re: [PATCH v1 09/15] tcg/riscv: Implement vector cmp ops
,
LIU Zhiwei
,
03:51
Re: [RFC PATCH 2/3] target/riscv: add Ssdbltrp extension support
,
Clément Léger
,
03:23
Re: [PATCH v9 11/17] target/riscv: mmu changes for zicfiss shadow stack protection
,
Alistair Francis
,
01:59
Re: [RFC PATCH 3/3] target/riscv: add Smdbltrp extension support
,
Tommy Wu
,
01:53
Re: [PATCH v9 10/17] target/riscv: tb flag for shadow stack instructions
,
Alistair Francis
,
01:52
Re: [PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions
,
Alistair Francis
,
01:48
Re: [RFC PATCH 2/3] target/riscv: add Ssdbltrp extension support
,
Tommy Wu
,
01:35
Re: [PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions
,
Richard Henderson
,
00:29
Re: [PATCH v9 08/17] target/riscv: Add zicfiss extension
,
Alistair Francis
,
00:21
Re: [PATCH v9 07/17] disas/riscv: enable `lpad` disassembly
,
Alistair Francis
,
00:15
Re: [PATCH v9 06/17] target/riscv: zicfilp `lpad` impl and branch tracking
,
Alistair Francis
,
00:14
Re: [PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions
,
Alistair Francis
,
00:04
August 26, 2024
Re: [PATCH v9 05/17] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Alistair Francis
,
23:58
Re: [PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions
,
Richard Henderson
,
23:58
Re: [PATCH v9 04/17] target/riscv: additional code information for sw check
,
Alistair Francis
,
23:55
Re: [PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions
,
Alistair Francis
,
23:53
Re: [PATCH v9 02/17] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Alistair Francis
,
22:58
Re: [PATCH v9 00/17] riscv support for control flow integrity extensions
,
Alistair Francis
,
22:45
Re: [PATCH for-9.2 v6 08/12] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)
,
Tomasz Jeznach
,
22:44
Re: [PATCH for-9.2 v6 03/12] hw/riscv: add RISC-V IOMMU base emulation
,
Tomasz Jeznach
,
22:18
Re: [PATCH v9 01/17] target/riscv: Add zicfilp extension
,
Alistair Francis
,
22:16
Re: [PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions
,
Richard Henderson
,
21:35
Re: [PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
20:52
Re: [PATCH v9 15/17] target/riscv: compressed encodings for sspush and sspopchk
,
Richard Henderson
,
20:37
Re: [PATCH v9 13/17] target/riscv: update `decode_save_opc` to store extra word2
,
Richard Henderson
,
20:35
Re: [PATCH v9 12/17] target/riscv: AMO operations always raise store/AMO fault
,
Richard Henderson
,
20:34
Re: [PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions
,
Richard Henderson
,
20:33
[PATCH v9 09/17] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
11:31
[PATCH v9 13/17] target/riscv: update `decode_save_opc` to store extra word2
,
Deepak Gupta
,
11:31
[PATCH v9 14/17] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
11:31
[PATCH v9 11/17] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
11:31
[PATCH v9 17/17] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
11:30
[PATCH v9 12/17] target/riscv: AMO operations always raise store/AMO fault
,
Deepak Gupta
,
11:30
[PATCH v9 10/17] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
11:30
[PATCH v9 16/17] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
11:30
[PATCH v9 06/17] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
11:30
[PATCH v9 15/17] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
11:30
[PATCH v9 08/17] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
11:30
[PATCH v9 05/17] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
11:30
[PATCH v9 07/17] disas/riscv: enable `lpad` disassembly
,
Deepak Gupta
,
11:30
[PATCH v9 03/17] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
11:30
[PATCH v9 04/17] target/riscv: additional code information for sw check
,
Deepak Gupta
,
11:30
[PATCH v9 02/17] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
11:30
[PATCH v9 01/17] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
11:30
[PATCH v9 00/17] riscv support for control flow integrity extensions
,
Deepak Gupta
,
11:29
Re: [PATCH v8 04/17] target/riscv: additional code information for sw check
,
Deepak Gupta
,
11:17
RE: [PATCH RESEND v4 0/3] Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
JeeHeng Sia
,
03:19
Re: [PATCH RESEND v4 0/3] Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
Sunil V L
,
03:14
RE: [PATCH RESEND v4 0/3] Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
JeeHeng Sia
,
03:04
RE: [PATCH RESEND v4 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden reference for RISC-V
,
JeeHeng Sia
,
01:01
RE: [PATCH RESEND v4 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
JeeHeng Sia
,
00:54
August 25, 2024
[PATCH v4 2/2] target/riscv: Add textra matching condition for the triggers
,
Alvin Chang
,
22:47
[PATCH v4 0/2] RISC-V: Add preliminary textra trigger CSR functions
,
Alvin Chang
,
22:47
[PATCH v4 1/2] target/riscv: Preliminary textra trigger CSR writting support
,
Alvin Chang
,
22:47
Re: [PATCH] target/riscv/kvm: Fix the group bit setting of AIA
,
Alistair Francis
,
20:29
Re: [PATCH RESEND v4 1/3] qtest: allow SPCR acpi table changes
,
Alistair Francis
,
20:27
Re: [PATCH v3 2/2] target/riscv: Add textra matching condition for the triggers
,
Alistair Francis
,
20:26
Re: [PATCH] target: riscv: Enable Bit Manip for OpenTitan Ibex CPU
,
Alistair Francis
,
20:23
Re: [PATCH] target/riscv: fix za64rs enabling
,
Alistair Francis
,
20:20
Re: [PATCH] target/riscv: fix za64rs enabling
,
Alistair Francis
,
20:16
Re: [PATCH] target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule
,
Alistair Francis
,
20:15
Re: [PATCH] target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule
,
Alistair Francis
,
20:10
Re: [PATCH v8 04/17] target/riscv: additional code information for sw check
,
Richard Henderson
,
20:00
August 24, 2024
[PATCH] target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule
,
Daniel Henrique Barboza
,
13:33
August 23, 2024
Re: [PATCH] target/riscv: fix za64rs enabling
,
Daniel Henrique Barboza
,
17:14
Re: [PATCH] target: riscv: Enable Bit Manip for OpenTitan Ibex CPU
,
Daniel Henrique Barboza
,
17:04
[PATCH v8 16/17] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
15:02
[PATCH v8 15/17] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
15:02
[PATCH v8 14/17] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
15:02
[PATCH v8 13/17] target/riscv: update `decode_save_opc` to store extra word2
,
Deepak Gupta
,
15:02
[PATCH v8 12/17] target/riscv: AMO operations always raise store/AMO fault
,
Deepak Gupta
,
15:02
[PATCH v8 11/17] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
15:02
[PATCH v8 17/17] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
15:02
[PATCH v8 10/17] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
15:02
[PATCH v8 08/17] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
15:02
[PATCH v8 09/17] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
15:02
[PATCH v8 07/17] disas/riscv: enable `lpad` disassembly
,
Deepak Gupta
,
15:02
[PATCH v8 05/17] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
15:02
[PATCH v8 06/17] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
15:02
[PATCH v8 03/17] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
15:02
[PATCH v8 04/17] target/riscv: additional code information for sw check
,
Deepak Gupta
,
15:02
[PATCH v8 02/17] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
15:02
[PATCH v8 01/17] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
15:02
[PATCH v8 00/17] riscv support for control flow integrity extensions
,
Deepak Gupta
,
15:01
Re: [PATCH for-9.2 v6 08/12] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)
,
Daniel Henrique Barboza
,
13:18
Re: [PATCH RESEND v4 0/3] Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
Sunil V L
,
10:29
Re: [PATCH RESEND v4 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden reference for RISC-V
,
Sunil V L
,
09:20
Re: [PATCH RESEND v4 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
Sunil V L
,
09:15
Re: [PATCH RESEND v4 1/3] qtest: allow SPCR acpi table changes
,
Sunil V L
,
09:11
Re: [PATCH for-9.2 v6 03/12] hw/riscv: add RISC-V IOMMU base emulation
,
Daniel Henrique Barboza
,
08:42
[PATCH RESEND v4 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden reference for RISC-V
,
Sia Jee Heng
,
07:33
[PATCH RESEND v4 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
Sia Jee Heng
,
07:32
[PATCH RESEND v4 1/3] qtest: allow SPCR acpi table changes
,
Sia Jee Heng
,
07:32
[PATCH RESEND v4 0/3] Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
Sia Jee Heng
,
07:32
[PATCH v4 0/3] Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
Sia Jee Heng
,
07:24
[PATCH v4 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden reference for RISC-V
,
Sia Jee Heng
,
07:04
[PATCH v4 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table revision 4 format
,
Sia Jee Heng
,
07:04
[PATCH v4 1/3] qtest: allow SPCR acpi table changes
,
Sia Jee Heng
,
07:04
[PATCH] target/riscv: fix za64rs enabling
,
Vladimir Isaev
,
02:38
August 22, 2024
[PATCH] target: riscv: Enable Bit Manip for OpenTitan Ibex CPU
,
Alistair Francis
,
20:32
Re: [PATCH v3 0/1] Add support for generating OpenSBI domains in the device tree
,
Gregor Haas
,
18:04
Re: [PATCH v3 0/1] Add support for generating OpenSBI domains in the device tree
,
Daniel Henrique Barboza
,
17:49
Re: [PATCH v3 1/1] Add support for generating OpenSBI domains in the device tree
,
Daniel Henrique Barboza
,
16:29
Re: [PATCH] target/riscv/kvm: Fix the group bit setting of AIA
,
Daniel Henrique Barboza
,
16:18
Re: [PATCH v7 13/17] target/riscv: update `decode_save_opc` to store extra word2
,
Deepak Gupta
,
13:02
[PATCH v7 15/17] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
04:25
[PATCH v7 14/17] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
04:25
[PATCH v7 16/17] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
04:25
[PATCH v7 17/17] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
04:25
[PATCH v7 11/17] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
04:25
[PATCH v7 13/17] target/riscv: update `decode_save_opc` to store extra word2
,
Deepak Gupta
,
04:25
[PATCH v7 10/17] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
04:25
[PATCH v7 08/17] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
04:25
[PATCH v7 06/17] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
04:25
[PATCH v7 05/17] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
04:25
[PATCH v7 03/17] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
04:25
[PATCH v7 12/17] target/riscv: AMO operations always raise store/AMO fault
,
Deepak Gupta
,
04:25
[PATCH v7 07/17] disas/riscv: enable `lpad` disassembly
,
Deepak Gupta
,
04:25
[PATCH v7 09/17] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
04:25
[PATCH v7 04/17] target/riscv: additional code information for sw check
,
Deepak Gupta
,
04:25
[PATCH v7 02/17] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
04:25
[PATCH v7 01/17] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
04:25
[PATCH v7 00/17] riscv support for control flow integrity extensions
,
Deepak Gupta
,
04:25
Re: [PATCH v6 12/16] target/riscv: AMO operations always raise store/AMO fault
,
Richard Henderson
,
01:13
August 21, 2024
Re: [PATCH v6 13/16] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
21:00
Re: [PATCH v6 12/16] target/riscv: AMO operations always raise store/AMO fault
,
Deepak Gupta
,
20:58
Re: [PATCH v6 13/16] target/riscv: implement zicfiss instructions
,
Richard Henderson
,
20:57
Re: [PATCH v6 12/16] target/riscv: AMO operations always raise store/AMO fault
,
Richard Henderson
,
20:43
Re: [PATCH v6 11/16] target/riscv: mmu changes for zicfiss shadow stack protection
,
Richard Henderson
,
20:30
Re: [PATCH v6 09/16] target/riscv: introduce ssp and enabling controls for zicfiss
,
Richard Henderson
,
20:27
Re: [PATCH v6 05/16] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Richard Henderson
,
20:25
[PATCH v6 16/16] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
17:50
[PATCH v6 15/16] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
17:50
[PATCH v6 14/16] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
17:50
[PATCH v6 13/16] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
17:50
[PATCH v6 12/16] target/riscv: AMO operations always raise store/AMO fault
,
Deepak Gupta
,
17:50
[PATCH v6 11/16] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
17:50
[PATCH v6 10/16] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
17:50
[PATCH v6 09/16] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
17:50
[PATCH v6 08/16] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
17:50
[PATCH v6 07/16] disas/riscv: enable `lpad` disassembly
,
Deepak Gupta
,
17:50
[PATCH v6 06/16] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
17:50
[PATCH v6 05/16] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
17:50
[PATCH v6 04/16] target/riscv: additional code information for sw check
,
Deepak Gupta
,
17:50
[PATCH v6 03/16] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
17:50
[PATCH v6 02/16] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
17:50
[PATCH v6 00/16] riscv support for control flow integrity extensions
,
Deepak Gupta
,
17:50
[PATCH v6 01/16] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
17:50
Re: [PATCH 5/5] hw/char: Extract serial-mm
,
Mark Cave-Ayland
,
10:49
Re: [PATCH 4/5] hw/char/serial.h: Extract serial-isa.h
,
Mark Cave-Ayland
,
10:46
Re: [PATCH 3/5] hw/ppc/Kconfig: Add missing SERIAL_ISA dependency to POWERNV machine
,
Mark Cave-Ayland
,
10:43
Re: [PATCH 1/5] hw: Remove unused inclusion of hw/char/serial.h
,
Mark Cave-Ayland
,
10:40
Re: [PATCH for-9.2 v6 04/12] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device
,
Gerd Hoffmann
,
07:36
[PATCH] target/riscv/kvm: Fix the group bit setting of AIA
,
Andrew Jones
,
03:50
August 20, 2024
Re: [PATCH v5 11/15] target/riscv: mmu changes for zicfiss shadow stack protection
,
Richard Henderson
,
18:33
Re: [PATCH v5 11/15] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
15:45
Re: [PATCH v5 11/15] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
14:55
Re: [PATCH for-9.2 v6 08/12] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)
,
Jason Chien
,
11:27
Re: [PATCH for-9.2 v6 03/12] hw/riscv: add RISC-V IOMMU base emulation
,
Jason Chien
,
11:16
RE: [PATCH v3 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
,
JeeHeng Sia
,
08:54
Re: [PATCH v1 07/15] tcg/riscv: Implement vector mov/dup{m/i}
,
LIU Zhiwei
,
05:26
Re: [PATCH v5 11/15] target/riscv: mmu changes for zicfiss shadow stack protection
,
Richard Henderson
,
05:21
Re: [PATCH v1 07/15] tcg/riscv: Implement vector mov/dup{m/i}
,
Richard Henderson
,
05:00
Re: [PATCH v5 11/15] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
03:35
Re: [PATCH v5 09/15] target/riscv: introduce ssp and enabling controls for zicfiss
,
Richard Henderson
,
01:34
Re: [PATCH v5 05/15] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Richard Henderson
,
01:24
Re: [PATCH v5 02/15] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Richard Henderson
,
01:17
Re: [PATCH v1 08/15] tcg/riscv: Add support for basic vector opcodes
,
Richard Henderson
,
01:14
August 19, 2024
RE: [PATCH v3 2/2] target/riscv: Add textra matching condition for the triggers
,
張哲嘉
,
23:59
Re: [PATCH v1 08/15] tcg/riscv: Add support for basic vector opcodes
,
LIU Zhiwei
,
21:58
Re: [PATCH v1 08/15] tcg/riscv: Add support for basic vector opcodes
,
LIU Zhiwei
,
21:56
[PATCH v5 09/15] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
20:02
[PATCH v5 14/15] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
20:02
[PATCH v5 11/15] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
20:02
[PATCH v5 15/15] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
20:02
[PATCH v5 13/15] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
20:02
[PATCH v5 07/15] disas/riscv: enable `lpad` disassembly
,
Deepak Gupta
,
20:02
[PATCH v5 05/15] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
20:02
[PATCH v5 06/15] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
20:02
[PATCH v5 12/15] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
20:02
[PATCH v5 10/15] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
20:02
[PATCH v5 08/15] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
20:02
[PATCH v5 03/15] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
20:02
[PATCH v5 01/15] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
20:02
[PATCH v5 04/15] target/riscv: additional code information for sw check
,
Deepak Gupta
,
20:02
[PATCH v5 02/15] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
20:02
[PATCH v5 00/15] riscv support for control flow integrity extensions
,
Deepak Gupta
,
20:01
[PATCH 08/11 v2] target/riscv: Update interrupt handling in CLIC mode
,
Ian Brockbank
,
12:14
[PATCH 09/11 v2] target/riscv: Update interrupt return in CLIC mode
,
Ian Brockbank
,
12:13
[PATCH 04/11 v2] target/riscv: Update CSR xie in CLIC mode
,
Ian Brockbank
,
12:13
[PATCH 06/11 v2] target/riscv: Update CSR xtvec in CLIC mode
,
Ian Brockbank
,
12:13
[PATCH 07/11 v2] target/riscv: Update CSR xnxti in CLIC mode
,
Ian Brockbank
,
12:13
[PATCH 05/11 v2] target/riscv: Update CSR xip in CLIC mode
,
Ian Brockbank
,
12:13
[PATCH 03/11 v2] hw/intc: Add CLIC device
,
Ian Brockbank
,
12:13
[PATCH 11/11 v2] tests: add riscv clic qtest case and a function in qtest
,
Ian Brockbank
,
12:12
[PATCH 10/11 v2] hw/riscv: add CLIC into virt machine
,
Ian Brockbank
,
12:12
[PATCH 02/11 v2] target/riscv: Update CSR xintthresh in CLIC mode
,
Ian Brockbank
,
12:11
[PATCH 01/11 v2] target/riscv: Add CLIC CSR mintstatus
,
Ian Brockbank
,
12:10
[PATCH 00/11 v2] RISC-V: support CLIC v0.9 specification
,
Ian Brockbank
,
12:08
[PATCH v2 2/2] hw/char: sifive_uart: Print uart charecters async
,
Alistair Francis
,
07:32
[PATCH v2 1/2] hw/char: riscv_htif: Use blocking qemu_chr_fe_write_all
,
Alistair Francis
,
07:32
[PATCH v2 0/2] riscv: char: Avoid dropped charecters
,
Alistair Francis
,
07:32
Re: [PATCH 2/2] hw/riscv/virt: Introduce strict-dt
,
Andrew Jones
,
03:50
Re: [PATCH 2/2] hw/char: sifive_uart: Print uart charecters async
,
Alistair Francis
,
01:32
Re: [PATCH v3 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
,
Sunil V L
,
00:17
August 18, 2024
Re: [PATCH v5 4/5] target/riscv: Add Smrnmi mnret instruction.
,
Alistair Francis
,
23:49
Re: [PATCH v5 1/5] target/riscv: Add `ext_smrnmi` in the RISCVCPUConfig.
,
Alistair Francis
,
23:40
Re: [PATCH v1 05/15] tcg/riscv: Add riscv vset{i}vli support
,
LIU Zhiwei
,
22:54
Re: [PATCH v1 05/15] tcg/riscv: Add riscv vset{i}vli support
,
Richard Henderson
,
22:35
Re: [PATCH v1 06/15] tcg/riscv: Implement vector load/store
,
LIU Zhiwei
,
21:42
Re: [PATCH v1 05/15] tcg/riscv: Add riscv vset{i}vli support
,
LIU Zhiwei
,
21:35
Re: [PATCH for-9.1 1/2] Revert "hw/riscv/virt.c: imsics DT: add '#msi-cells'"
,
Alistair Francis
,
21:20
Re: [PATCH 2/2] hw/riscv/virt: Introduce strict-dt
,
Alistair Francis
,
21:19
Re: [PATCH for-9.2 v6 03/12] hw/riscv: add RISC-V IOMMU base emulation
,
Daniel Henrique Barboza
,
14:20
August 17, 2024
Re: [PATCH for-9.2 v6 03/12] hw/riscv: add RISC-V IOMMU base emulation
,
Andrew Jones
,
07:34
August 16, 2024
[PATCH] hw/riscv: Respect firmware ELF entry point
,
Samuel Holland
,
20:54
Re: [PATCH for-9.1 1/2] Revert "hw/riscv/virt.c: imsics DT: add '#msi-cells'"
,
Daniel Henrique Barboza
,
12:55
Re: [PATCH for-9.1 1/2] Revert "hw/riscv/virt.c: imsics DT: add '#msi-cells'"
,
Philippe Mathieu-Daudé
,
12:45
Re: [PATCH for-9.1 1/2] Revert "hw/riscv/virt.c: imsics DT: add '#msi-cells'"
,
Philippe Mathieu-Daudé
,
12:27
[PATCH 2/2] hw/riscv/virt: Introduce strict-dt
,
Andrew Jones
,
12:08
[PATCH for-9.1 1/2] Revert "hw/riscv/virt.c: imsics DT: add '#msi-cells'"
,
Andrew Jones
,
12:07
[PATCH 0/2] hw/riscv/virt: Fix PCI devices with AIA
,
Andrew Jones
,
12:07
Re: [PATCH v2 16/21] virtio-net: Use replay_schedule_bh_event for bhs that affect machine state
,
Alex Bennée
,
08:59
Re: [PATCH 1/2] hw/char: riscv_htif: Use blocking qemu_chr_fe_write_all
,
Daniel Henrique Barboza
,
07:39
Re: [PATCH 3/5] hw/ppc/Kconfig: Add missing SERIAL_ISA dependency to POWERNV machine
,
Philippe Mathieu-Daudé
,
05:19
Re: [PATCH v4 13/16] target/riscv: compressed encodings for sspush and sspopchk
,
Richard Henderson
,
03:28
Re: [PATCH v4 16/16] target/riscv: add trace-hooks for each case of sw-check exception
,
Deepak Gupta
,
03:06
Re: [PATCH v4 13/16] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
02:56
Re: [PATCH v4 05/16] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
02:49
Re: [PATCH v4 03/16] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
02:45
Re: [PATCH v4 16/16] target/riscv: add trace-hooks for each case of sw-check exception
,
Richard Henderson
,
01:52
Re: [PATCH v4 12/16] target/riscv: implement zicfiss instructions
,
Richard Henderson
,
01:43
Re: [PATCH v4 11/16] target/riscv: mmu changes for zicfiss shadow stack protection
,
Richard Henderson
,
01:35
Re: [PATCH v4 13/16] target/riscv: compressed encodings for sspush and sspopchk
,
Richard Henderson
,
01:09
Re: [PATCH v4 07/16] disas/riscv: enabled `lpad` disassembly
,
Richard Henderson
,
00:00
August 15, 2024
Re: [PATCH v4 06/16] target/riscv: zicfilp `lpad` impl and branch tracking
,
Richard Henderson
,
23:59
Re: [PATCH v4 05/16] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Richard Henderson
,
23:42
Re: [PATCH v2 16/21] virtio-net: Use replay_schedule_bh_event for bhs that affect machine state
,
Jason Wang
,
23:14
Re: [PATCH v4 03/16] target/riscv: save and restore elp state on priv transitions
,
Richard Henderson
,
23:00
Re: [PATCH v4 02/16] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Richard Henderson
,
22:56
Re: [PATCH v2 16/21] virtio-net: Use replay_schedule_bh_event for bhs that affect machine state
,
Nicholas Piggin
,
22:26
[PATCH v4 13/16] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
21:07
[PATCH v4 16/16] target/riscv: add trace-hooks for each case of sw-check exception
,
Deepak Gupta
,
21:07
[PATCH v4 12/16] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
21:07
[PATCH v4 09/16] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
21:07
[PATCH v4 15/16] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
21:07
[PATCH v4 14/16] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
21:07
[PATCH v4 11/16] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
21:07
[PATCH v4 06/16] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
21:07
[PATCH v4 10/16] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
21:07
[PATCH v4 08/16] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
21:07
[PATCH v4 07/16] disas/riscv: enabled `lpad` disassembly
,
Deepak Gupta
,
21:07
[PATCH v4 02/16] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
21:07
[PATCH v4 05/16] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
21:07
[PATCH v4 04/16] target/riscv: additional code information for sw check
,
Deepak Gupta
,
21:07
[PATCH v4 03/16] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
21:07
[PATCH v4 01/16] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
21:07
[PATCH v4 00/16] riscv support for control flow integrity extensions
,
Deepak Gupta
,
21:07
Re: [PATCH 2/5] hw/char/serial: Remove unused funtion
,
Bernhard Beschow
,
14:00
Re: [PATCH v2 16/21] virtio-net: Use replay_schedule_bh_event for bhs that affect machine state
,
Michael S. Tsirkin
,
10:29
Re: [PATCH v1 07/15] tcg/riscv: Implement vector mov/dup{m/i}
,
LIU Zhiwei
,
06:50
Re: [PATCH 2/5] hw/char/serial: Remove unused funtion
,
Philippe Mathieu-Daudé
,
05:27
Re: [PATCH 2/2] hw/char: sifive_uart: Print uart charecters async
,
Mark Cave-Ayland
,
04:27
Re: [PATCH 2/5] hw/char/serial: Remove unused funtion
,
Mark Cave-Ayland
,
04:25
Re: [PATCH v2 16/21] virtio-net: Use replay_schedule_bh_event for bhs that affect machine state
,
Nicholas Piggin
,
03:13
August 14, 2024
[PATCH 2/2] hw/char: sifive_uart: Print uart charecters async
,
Alistair Francis
,
21:54
[PATCH 1/2] hw/char: riscv_htif: Use blocking qemu_chr_fe_write_all
,
Alistair Francis
,
21:54
[PATCH 0/2] riscv: char: Avoid dropped charecters
,
Alistair Francis
,
21:54
RE: [PATCH v5 2/5] target/riscv: Handle Smrnmi interrupt and exception.
,
張哲嘉
,
21:47
Re: [PATCH 5/5] hw/char: Extract serial-mm
,
Andrew Jeffery
,
21:02
Re: [PATCH 2/5] hw/char/serial: Remove unused funtion
,
BALATON Zoltan
,
17:39
[PATCH 5/5] hw/char: Extract serial-mm
,
Bernhard Beschow
,
14:16
[PATCH 4/5] hw/char/serial.h: Extract serial-isa.h
,
Bernhard Beschow
,
14:16
[PATCH 1/5] hw: Remove unused inclusion of hw/char/serial.h
,
Bernhard Beschow
,
14:16
[PATCH 3/5] hw/ppc/Kconfig: Add missing SERIAL_ISA dependency to POWERNV machine
,
Bernhard Beschow
,
14:16
[PATCH 2/5] hw/char/serial: Remove unused funtion
,
Bernhard Beschow
,
14:16
[PATCH 0/5] Serial device cleanup
,
Bernhard Beschow
,
14:16
Re: [PATCH v2 16/21] virtio-net: Use replay_schedule_bh_event for bhs that affect machine state
,
Alex Bennée
,
13:25
RE: [PATCH 00/11] RISC-V: support CLIC v0.9 specification
,
Ian Brockbank
,
10:12
Re: [PATCH v1 15/15] tcg/riscv: Enable vector TCG host-native
,
Richard Henderson
,
06:16
Re: [PATCH v1 14/15] tcg/riscv: Implement vector roti/v/x shi ops
,
Richard Henderson
,
05:55
Re: [PATCH v1 10/15] tcg/riscv: Implement vector not/neg ops
,
Richard Henderson
,
05:46
Re: [PATCH v1 09/15] tcg/riscv: Implement vector cmp ops
,
Richard Henderson
,
05:39
Re: [PATCH v1 08/15] tcg/riscv: Add support for basic vector opcodes
,
Richard Henderson
,
05:17
Re: [PATCH v1 08/15] tcg/riscv: Add support for basic vector opcodes
,
Richard Henderson
,
05:14
Re: [PATCH v1 07/15] tcg/riscv: Implement vector mov/dup{m/i}
,
Richard Henderson
,
05:12
Re: [PATCH v1 06/15] tcg/riscv: Implement vector load/store
,
Richard Henderson
,
05:01
[PATCH 06/11] target/riscv: Update CSR xtvec in CLIC mode
,
Ian Brockbank
,
04:43
[PATCH 07/11] target/riscv: Update CSR xnxti in CLIC mode
,
Ian Brockbank
,
04:43
[PATCH 05/11] target/riscv: Update CSR xip in CLIC mode
,
Ian Brockbank
,
04:43
[PATCH 04/11] target/riscv: Update CSR xie in CLIC mode
,
Ian Brockbank
,
04:42
[PATCH 01/11] target/riscv: Add CLIC CSR mintstatus
,
Ian Brockbank
,
04:42
[PATCH 02/11] target/riscv: Update CSR xintthresh in CLIC mode
,
Ian Brockbank
,
04:41
[PATCH 03/11] hw/intc: Add CLIC device
,
Ian Brockbank
,
04:40
[PATCH 00/11] RISC-V: support CLIC v0.9 specification
,
Ian Brockbank
,
04:39
Re: [PATCH v2 08/21] buildsys: Fix building without plugins on Darwin
,
Philippe Mathieu-Daudé
,
04:29
Re: [PATCH v1 05/15] tcg/riscv: Add riscv vset{i}vli support
,
Richard Henderson
,
04:25
Re: [PATCH v1 03/15] tcg: Fix register allocation constraints
,
LIU Zhiwei
,
03:47
Re: [PATCH v2 16/21] virtio-net: Use replay_schedule_bh_event for bhs that affect machine state
,
Michael S. Tsirkin
,
03:07
Re: [PATCH v2 16/21] virtio-net: Use replay_schedule_bh_event for bhs that affect machine state
,
Nicholas Piggin
,
02:06
Re: [PATCH v1 03/15] tcg: Fix register allocation constraints
,
Richard Henderson
,
00:18
August 13, 2024
Re: [PATCH v1 03/15] tcg: Fix register allocation constraints
,
LIU Zhiwei
,
23:31
Re: [PATCH v1 03/15] tcg: Fix register allocation constraints
,
Richard Henderson
,
23:09
Re: [PATCH v1 03/15] tcg: Fix register allocation constraints
,
LIU Zhiwei
,
22:27
Re: [PATCH v1 03/15] tcg: Fix register allocation constraints
,
Richard Henderson
,
22:04
Re: [PATCH v1 03/15] tcg: Fix register allocation constraints
,
LIU Zhiwei
,
20:59
Re: [PATCH v2 17/21] virtio-net: Use virtual time for RSC timers
,
Michael S. Tsirkin
,
16:49
Re: [PATCH v2 16/21] virtio-net: Use replay_schedule_bh_event for bhs that affect machine state
,
Michael S. Tsirkin
,
16:48
[PATCH v2 19/21] docs: Fix some typos (found by typos) and grammar issues
,
Alex Bennée
,
16:30
[PATCH v2 20/21] docs/devel: update tcg-plugins page
,
Alex Bennée
,
16:30
[PATCH v2 17/21] virtio-net: Use virtual time for RSC timers
,
Alex Bennée
,
16:30
[PATCH v2 18/21] savevm: Fix load_snapshot error path crash
,
Alex Bennée
,
16:30
[PATCH v2 16/21] virtio-net: Use replay_schedule_bh_event for bhs that affect machine state
,
Alex Bennée
,
16:24
[PATCH v2 14/21] tests/avocado: replay_kernel.py add x86-64 q35 machine test
,
Alex Bennée
,
16:24
[PATCH v2 15/21] chardev: set record/replay on the base device of a muxed device
,
Alex Bennée
,
16:24
[PATCH v2 11/21] tests/avocado: excercise scripts/replay-dump.py in replay tests
,
Alex Bennée
,
16:24
[PATCH v2 21/21] plugins: fix race condition with scoreboards
,
Alex Bennée
,
16:24
[PATCH v2 10/21] scripts/replay-dump.py: rejig decoders in event number order
,
Alex Bennée
,
16:24
[PATCH v2 13/21] Revert "replay: stop us hanging in rr_wait_io_event"
,
Alex Bennée
,
16:24
[PATCH v2 12/21] replay: allow runstate shutdown->running when replaying trace
,
Alex Bennée
,
16:24
[PATCH v2 09/21] scripts/replay-dump.py: Update to current rr record format
,
Alex Bennée
,
16:24
[PATCH v2 08/21] buildsys: Fix building without plugins on Darwin
,
Alex Bennée
,
16:24
[PATCH v2 05/21] configure: Fix GDB version detection for GDB_HAS_MTE
,
Alex Bennée
,
16:24
[PATCH v2 06/21] scripts/checkpatch: more checks on files imported from Linux
,
Alex Bennée
,
16:24
[PATCH v2 07/21] target/i386: allow access_ptr to force slow path on failed probe
,
Alex Bennée
,
16:23
[PATCH v2 02/21] Makefile: trigger re-configure on updated pythondeps
,
Alex Bennée
,
16:23
[PATCH v2 03/21] configure: Fix arch detection for GDB_HAS_MTE
,
Alex Bennée
,
16:23
[PATCH v2 01/21] tests/avocado: Re-enable gdbsim-r5f562n8 testing U-Boot
,
Alex Bennée
,
16:23
[PATCH v2 04/21] configure: Avoid use of param. expansion when using gdb_version
,
Alex Bennée
,
16:23
[PATCH v2 00/21] Various fixes and tweaks for 9.1-rc2/3
,
Alex Bennée
,
16:23
[PATCH 00/11] RISC-V: support CLIC v0.9 specification
,
Ian Brockbank
,
11:08
[PATCH] target/riscv: Add CLIC CSR mintstatus
,
Ian Brockbank
,
11:08
[PATCH] target/riscv: Update CSR xtvec in CLIC mode
,
Ian Brockbank
,
11:08
[PATCH] target/riscv: Update CSR xintthresh in CLIC mode
,
Ian Brockbank
,
11:08
[PATCH] target/riscv: Update CSR xnxti in CLIC mode
,
Ian Brockbank
,
11:08
[PATCH] target/riscv: Update interrupt handling in CLIC mode
,
Ian Brockbank
,
11:08
[PATCH] hw/intc: Add CLIC device
,
Ian Brockbank
,
11:08
[PATCH] target/riscv: Update CSR xie in CLIC mode
,
Ian Brockbank
,
11:08
[PATCH] hw/riscv: add CLIC into virt machine
,
Ian Brockbank
,
11:08
[PATCH] target/riscv: Update interrupt return in CLIC mode
,
Ian Brockbank
,
11:08
[PATCH] tests: add riscv clic qtest case and a function in qtest
,
Ian Brockbank
,
11:08
[PATCH] target/riscv: Update CSR xip in CLIC mode
,
Ian Brockbank
,
11:08
Re: [PATCH v1 04/15] tcg/riscv: Add basic support for vector
,
Richard Henderson
,
08:20
Re: [PATCH v1 03/15] tcg: Fix register allocation constraints
,
Richard Henderson
,
07:52
[PATCH v1 15/15] tcg/riscv: Enable vector TCG host-native
,
LIU Zhiwei
,
07:43
[PATCH v1 14/15] tcg/riscv: Implement vector roti/v/x shi ops
,
LIU Zhiwei
,
07:42
[PATCH v1 13/15] tcg/riscv: Implement vector shs/v ops
,
LIU Zhiwei
,
07:42
[PATCH v1 12/15] tcg/riscv: Implement vector min/max ops
,
LIU Zhiwei
,
07:41
[PATCH v1 11/15] tcg/riscv: Implement vector sat/mul ops
,
LIU Zhiwei
,
07:41
[PATCH v1 10/15] tcg/riscv: Implement vector not/neg ops
,
LIU Zhiwei
,
07:40
[PATCH v1 09/15] tcg/riscv: Implement vector cmp ops
,
LIU Zhiwei
,
07:40
[PATCH v1 08/15] tcg/riscv: Add support for basic vector opcodes
,
LIU Zhiwei
,
07:39
[PATCH v1 07/15] tcg/riscv: Implement vector mov/dup{m/i}
,
LIU Zhiwei
,
07:38
[PATCH v1 06/15] tcg/riscv: Implement vector load/store
,
LIU Zhiwei
,
07:38
[PATCH v1 05/15] tcg/riscv: Add riscv vset{i}vli support
,
LIU Zhiwei
,
07:37
[PATCH v1 04/15] tcg/riscv: Add basic support for vector
,
LIU Zhiwei
,
07:37
[PATCH v1 03/15] tcg: Fix register allocation constraints
,
LIU Zhiwei
,
07:36
[PATCH v1 02/15] tcg/op-gvec: Fix iteration step in 32-bit operation
,
LIU Zhiwei
,
07:36
[PATCH v1 01/15] util: Add RISC-V vector extension probe in cpuinfo
,
LIU Zhiwei
,
07:35
[PATCH v1 00/15] tcg/riscv: Add support for vector
,
LIU Zhiwei
,
07:35
Re: [PATCH] target/riscv32: Fix masking of physical address
,
Andrew Jones
,
06:23
Re: [PATCH] target/riscv32: Fix masking of physical address
,
Philippe Mathieu-Daudé
,
04:21
Re: [PATCH] target/riscv32: Fix masking of physical address
,
Andrew Jones
,
04:00
Re: [PATCH] target/riscv32: Fix masking of physical address
,
Richard Henderson
,
03:43
[PATCH] target/riscv32: Fix masking of physical address
,
Andrew Jones
,
03:14
[PATCH v3 0/3] Upgrade ACPI SPCR table to support SPCR table version 4 format
,
Sia Jee Heng
,
01:44
[PATCH v3 1/3] qtest: allow SPCR acpi table changes
,
Sia Jee Heng
,
01:24
[PATCH v3 2/3] hw/acpi: Upgrade ACPI SPCR table to support SPCR table version 4 format
,
Sia Jee Heng
,
01:24
[PATCH v3 3/3] tests/qtest/bios-tables-test: Update virt SPCR golden references
,
Sia Jee Heng
,
01:24
August 12, 2024
Re: [PATCH v3 01/20] accel/tcg: restrict assert on icount_enabled to qemu-system
,
Deepak Gupta
,
13:41
Re: [PATCH v2 2/3] hw/dma: xilinx_axidma: Send DMA error IRQ if any memory access is failed
,
Jim Shu
,
08:54
Re: [PATCH 8/8] qemu-options: Add the description of smp-cache object
,
Zhao Liu
,
05:09
Re: [PATCH 08/14] tests/avocado: remove tcg_plugins virt_mem_icount test
,
Thomas Huth
,
02:26
August 11, 2024
Re: [PATCH v8 8/8] hw/riscv/virt: Add IOPMP support
,
Ethan Chen
,
22:55
Re: [PATCH v8 5/8] hw/misc/riscv_iopmp: Add API to set up IOPMP protection for system memory
,
Ethan Chen
,
22:44
Re: [PATCH v8 8/8] hw/riscv/virt: Add IOPMP support
,
Alistair Francis
,
20:49
Re: [PATCH v8 5/8] hw/misc/riscv_iopmp: Add API to set up IOPMP protection for system memory
,
Alistair Francis
,
20:48
Re: [PATCH v8 4/8] hw/misc/riscv_iopmp: Add RISC-V IOPMP device
,
Alistair Francis
,
20:43
Re: [PATCH] target/riscv: Use get_address() to get address with Zicbom extensions
,
Alistair Francis
,
20:35
Re: [PATCH v3 14/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Richard Henderson
,
18:23
Re: [PATCH] target/riscv: Use get_address() to get address with Zicbom extensions
,
Michael Tokarev
,
13:48
August 09, 2024
Re: [PATCH v2 13/13] target/riscv: Enable PMU related extensions to preferred rule
,
Atish Kumar Patra
,
17:40
Re: [PATCH v3 14/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
14:55
Re: [PATCH 8/8] qemu-options: Add the description of smp-cache object
,
Markus Armbruster
,
08:25
Re: [PATCH v8 8/8] hw/riscv/virt: Add IOPMP support
,
Ethan Chen
,
06:15
Re: [PATCH v8 5/8] hw/misc/riscv_iopmp: Add API to set up IOPMP protection for system memory
,
Ethan Chen
,
06:12
Re: [PATCH v8 4/8] hw/misc/riscv_iopmp: Add RISC-V IOPMP device
,
Ethan Chen
,
06:04
Re: [PATCH v8 6/8] hw/misc/riscv_iopmp: Add API to configure RISCV CPU IOPMP support
,
Ethan Chen
,
05:57
Re: [PATCH v8 4/8] hw/misc/riscv_iopmp: Add RISC-V IOPMP device
,
Ethan Chen
,
05:43
[PATCH v5 5/5] target/riscv: Add Smrnmi cpu extension.
,
Tommy Wu
,
04:12
[PATCH v5 4/5] target/riscv: Add Smrnmi mnret instruction.
,
Tommy Wu
,
04:12
[PATCH v5 3/5] target/riscv: Add Smrnmi CSRs.
,
Tommy Wu
,
04:12
[PATCH v5 2/5] target/riscv: Handle Smrnmi interrupt and exception.
,
Tommy Wu
,
04:12
[PATCH v5 1/5] target/riscv: Add `ext_smrnmi` in the RISCVCPUConfig.
,
Tommy Wu
,
04:12
[PATCH v5 0/5] target/riscv: Add Smrnmi support.
,
Tommy Wu
,
04:12
Re: [PATCH v4 1/4] target/riscv: Add Smrnmi cpu extension.
,
Tommy Wu
,
01:51
Re: [PATCH v4 1/4] target/riscv: Add Smrnmi cpu extension.
,
Tommy Wu
,
01:49
Re: [PATCH v4 0/4] target/riscv: Add Smrnmi support.
,
Tommy Wu
,
01:32
August 08, 2024
Re: [PATCH 1/1] hw/intc/riscv_aplic: Fix APLIC in clrip and clripnum write emulation
,
Yong-Xuan Wang
,
23:28
Re: [PATCH 1/1] hw/intc/riscv_aplic: Fix APLIC in clrip and clripnum write emulation
,
Daniel Henrique Barboza
,
17:40
Re: [PATCH v2 3/3] hw/net: xilinx_axienet: Fix DMA RX IRQ if ethernet disable RX
,
Peter Maydell
,
09:35
Re: [PATCH v2 2/3] hw/dma: xilinx_axidma: Send DMA error IRQ if any memory access is failed
,
Peter Maydell
,
09:34
Re: [PATCH v2 1/3] hw/dma: xilinx_axidma: Correct the txlen value in the descriptor
,
Peter Maydell
,
09:22
Virtio Commands in Qemu Monitor
,
bob stone
,
08:53
Re: [PATCH v2 13/13] target/riscv: Enable PMU related extensions to preferred rule
,
Alistair Francis
,
04:24
[PATCH 1/1] hw/intc/riscv_aplic: Fix APLIC in clrip and clripnum write emulation
,
Yong-Xuan Wang
,
04:20
[PATCH 1/1] hw/intc/riscv_aplic: Check and update pending when write sourcecfg
,
Yong-Xuan Wang
,
04:19
Re: [PATCH v2 13/13] target/riscv: Enable PMU related extensions to preferred rule
,
Atish Kumar Patra
,
04:12
Re: [PATCH v8 6/8] hw/misc/riscv_iopmp: Add API to configure RISCV CPU IOPMP support
,
Alistair Francis
,
00:25
Re: [PATCH v8 5/8] hw/misc/riscv_iopmp: Add API to set up IOPMP protection for system memory
,
Alistair Francis
,
00:24
Re: [PATCH v8 2/8] system/physmem: Support IOMMU granularity smaller than TARGET_PAGE size
,
Alistair Francis
,
00:14
Re: [PATCH v8 3/8] target/riscv: Add support for IOPMP
,
Alistair Francis
,
00:13
Re: [PATCH v8 8/8] hw/riscv/virt: Add IOPMP support
,
Alistair Francis
,
00:01
August 07, 2024
Re: [PATCH v8 4/8] hw/misc/riscv_iopmp: Add RISC-V IOPMP device
,
Alistair Francis
,
23:57
Re: [PATCH] target/riscv: Add a property to set vl to ceil(AVL/2)
,
Alistair Francis
,
21:23
RE: [PATCH v3 0/2] RISC-V: Add preliminary textra trigger CSR functions
,
張哲嘉
,
21:12
Re: [PATCH v2 13/13] target/riscv: Enable PMU related extensions to preferred rule
,
Alistair Francis
,
20:27
Re: [PATCH v3 15/20] target/riscv: shadow stack mmu index for shadow stack instructions
,
Deepak Gupta
,
19:13
Re: [PATCH v3 04/20] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
18:58
Re: [PATCH v3 15/20] target/riscv: shadow stack mmu index for shadow stack instructions
,
Richard Henderson
,
18:58
Re: [PATCH v3 04/20] target/riscv: save and restore elp state on priv transitions
,
Richard Henderson
,
18:40
Re: [PATCH v3 12/20] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
17:25
Re: [PATCH v3 15/20] target/riscv: shadow stack mmu index for shadow stack instructions
,
Deepak Gupta
,
17:23
Re: [PATCH v3 20/20] linux-user: Add RISC-V zicfilp support in VDSO
,
Deepak Gupta
,
17:00
Re: [PATCH v3 19/20] linux-user: permit RISC-V CFI dynamic entry in VDSO
,
Deepak Gupta
,
16:53
Re: [PATCH v3 18/20] target/riscv: add trace-hooks for each case of sw-check exception
,
Deepak Gupta
,
16:52
Re: [PATCH v3 12/20] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
16:35
Re: [PATCH v3 10/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
16:21
Re: [PATCH v3 06/20] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
16:15
Re: [PATCH v3 04/20] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
16:11
Re: [PATCH v3 03/20] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
14:46
Re: [PATCH v3 01/20] accel/tcg: restrict assert on icount_enabled to qemu-system
,
Deepak Gupta
,
14:45
Re: [PATCH v3 0/2] RISC-V: Add preliminary textra trigger CSR functions
,
Alistair Francis
,
06:59
Re: [PATCH for-9.2 v6 02/12] hw/riscv: add riscv-iommu-bits.h
,
Jason Chien
,
04:37
Re: [PATCH v2 03/13] target/riscv: Enable S*stateen bits for AIA
,
Atish Kumar Patra
,
03:54
Re: [PATCH v2 01/13] target/riscv: Add properties for Indirect CSR Access extension
,
Atish Kumar Patra
,
03:53
Re: [PATCH v2 04/13] target/riscv: Support generic CSR indirect access
,
Atish Kumar Patra
,
03:50
Re: [PATCH v2 07/13] target/riscv: Add counter delegation/configuration support
,
Atish Kumar Patra
,
03:48
Re: [PATCH v2 12/13] target/riscv: Add a preferred ISA extension rule
,
Atish Kumar Patra
,
03:47
Re: [PATCH v2 13/13] target/riscv: Enable PMU related extensions to preferred rule
,
Atish Kumar Patra
,
03:44
Re: [PATCH] target/riscv: Add a property to set vl to ceil(AVL/2)
,
Jason Chien
,
03:29
RE: [PATCH v3 0/2] RISC-V: Add preliminary textra trigger CSR functions
,
張哲嘉
,
01:24
Re: [PATCH 1/2] include: bitops: Add mask extract64/deposit64
,
Alistair Francis
,
00:11
August 06, 2024
Re: [PATCH v3 20/20] linux-user: Add RISC-V zicfilp support in VDSO
,
Richard Henderson
,
23:41
Re: [PATCH v3 19/20] linux-user: permit RISC-V CFI dynamic entry in VDSO
,
Richard Henderson
,
23:36
Re: [PATCH v3 18/20] target/riscv: add trace-hooks for each case of sw-check exception
,
Richard Henderson
,
23:27
Re: [PATCH v3 16/20] disas/riscv: enable disassembly for zicfiss instructions
,
Richard Henderson
,
23:24
Re: [PATCH v3 14/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Richard Henderson
,
23:20
Re: [PATCH v3 12/20] target/riscv: implement zicfiss instructions
,
Richard Henderson
,
22:57
Re: [PATCH v3 15/20] target/riscv: shadow stack mmu index for shadow stack instructions
,
Richard Henderson
,
22:43
Re: [PATCH v3 13/20] target/riscv: compressed encodings for sspush and sspopchk
,
Richard Henderson
,
22:40
Re: [PATCH v3 12/20] target/riscv: implement zicfiss instructions
,
Richard Henderson
,
22:39
Re: [PATCH v3 11/20] target/riscv: tb flag for shadow stack instructions
,
Richard Henderson
,
22:13
Re: [PATCH v3 10/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Richard Henderson
,
22:13
Re: [PATCH v3 10/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Richard Henderson
,
22:11
Re: [PATCH v3 08/20] disas/riscv: enabled `lpad` disassembly
,
Richard Henderson
,
22:06
Re: [PATCH v3 07/20] target/riscv: zicfilp `lpad` impl and branch tracking
,
Richard Henderson
,
22:05
Re: [PATCH v2 13/13] target/riscv: Enable PMU related extensions to preferred rule
,
Alistair Francis
,
22:02
Re: [PATCH v3 07/20] target/riscv: zicfilp `lpad` impl and branch tracking
,
Richard Henderson
,
22:01
Re: [PATCH v3 06/20] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Richard Henderson
,
21:23
Re: [PATCH v3 05/20] target/riscv: additional code information for sw check
,
Richard Henderson
,
21:11
Re: [PATCH v3 04/20] target/riscv: save and restore elp state on priv transitions
,
Richard Henderson
,
21:07
Re: [PATCH v3 03/20] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Richard Henderson
,
20:56
Re: [PATCH v3 01/20] accel/tcg: restrict assert on icount_enabled to qemu-system
,
Richard Henderson
,
20:49
[PATCH v3 18/20] target/riscv: add trace-hooks for each case of sw-check exception
,
Deepak Gupta
,
20:08
[PATCH v3 19/20] linux-user: permit RISC-V CFI dynamic entry in VDSO
,
Deepak Gupta
,
20:08
[PATCH v3 17/20] disas/riscv: enable disassembly for compressed sspush/sspopchk
,
Deepak Gupta
,
20:08
[PATCH v3 09/20] target/riscv: Add zicfiss extension
,
Deepak Gupta
,
20:08
[PATCH v3 13/20] target/riscv: compressed encodings for sspush and sspopchk
,
Deepak Gupta
,
20:08
[PATCH v3 14/20] target/riscv: mmu changes for zicfiss shadow stack protection
,
Deepak Gupta
,
20:08
[PATCH v3 15/20] target/riscv: shadow stack mmu index for shadow stack instructions
,
Deepak Gupta
,
20:08
[PATCH v3 16/20] disas/riscv: enable disassembly for zicfiss instructions
,
Deepak Gupta
,
20:08
[PATCH v3 20/20] linux-user: Add RISC-V zicfilp support in VDSO
,
Deepak Gupta
,
20:07
[PATCH v3 10/20] target/riscv: introduce ssp and enabling controls for zicfiss
,
Deepak Gupta
,
20:07
[PATCH v3 11/20] target/riscv: tb flag for shadow stack instructions
,
Deepak Gupta
,
20:07
[PATCH v3 07/20] target/riscv: zicfilp `lpad` impl and branch tracking
,
Deepak Gupta
,
20:07
[PATCH v3 08/20] disas/riscv: enabled `lpad` disassembly
,
Deepak Gupta
,
20:07
[PATCH v3 06/20] target/riscv: tracking indirect branches (fcfi) for zicfilp
,
Deepak Gupta
,
20:07
[PATCH v3 05/20] target/riscv: additional code information for sw check
,
Deepak Gupta
,
20:07
[PATCH v3 12/20] target/riscv: implement zicfiss instructions
,
Deepak Gupta
,
20:07
[PATCH v3 02/20] target/riscv: Add zicfilp extension
,
Deepak Gupta
,
20:07
[PATCH v3 01/20] accel/tcg: restrict assert on icount_enabled to qemu-system
,
Deepak Gupta
,
20:07
[PATCH v3 04/20] target/riscv: save and restore elp state on priv transitions
,
Deepak Gupta
,
20:07
[PATCH v3 03/20] target/riscv: Introduce elp state and enabling controls for zicfilp
,
Deepak Gupta
,
20:07
[PATCH v3 00/20] riscv support for control flow integrity extensions
,
Deepak Gupta
,
20:07
Re: [PATCH v2 13/13] target/riscv: Enable PMU related extensions to preferred rule
,
Daniel Henrique Barboza
,
12:05
Re: [PATCH v2 13/13] target/riscv: Enable PMU related extensions to preferred rule
,
Andrew Jones
,
04:46
Re: [PATCH v2 10/13] target/riscv: Enable sscofpmf for bare cpu by default
,
Andrew Jones
,
04:27
Re: [PATCH 1/2] include: bitops: Add mask extract64/deposit64
,
Richard Henderson
,
03:32
August 05, 2024
Re: [PATCH v2 10/13] target/riscv: Enable sscofpmf for bare cpu by default
,
Alistair Francis
,
21:51
Re: [PATCH v2 12/13] target/riscv: Add a preferred ISA extension rule
,
Alistair Francis
,
21:48
Re: [PATCH v2 09/13] target/riscv: Invoke pmu init after feature enable
,
Alistair Francis
,
21:43
Re: [PATCH v2 08/13] target/riscv: Add configuration for S[m|s]csrind, Smcdeleg/Ssccfg
,
Alistair Francis
,
21:22
Re: [PATCH v2 07/13] target/riscv: Add counter delegation/configuration support
,
Alistair Francis
,
21:21
Re: [PATCH v2 06/13] target/riscv: Add select value range check for counter delegation
,
Alistair Francis
,
20:41
Re: [PATCH v2 05/13] target/riscv: Add counter delegation definitions
,
Alistair Francis
,
20:37
Re: [PATCH v2 04/13] target/riscv: Support generic CSR indirect access
,
Alistair Francis
,
20:16
Re: [PATCH v2 03/13] target/riscv: Enable S*stateen bits for AIA
,
Alistair Francis
,
20:12
Re: [PATCH v2 02/13] target/riscv: Decouple AIA processing from xiselect and xireg
,
Alistair Francis
,
20:06
Re: [PATCH for-9.2 v6 02/12] hw/riscv: add riscv-iommu-bits.h
,
Alistair Francis
,
19:47
Re: [PATCH for-9.1 0/1] roms/opensbi: update to v1.5.1
,
Alistair Francis
,
19:36
Re: [PATCH for-9.1 1/1] roms/opensbi: Update to v1.5.1
,
Alistair Francis
,
19:34
[PATCH v3 1/1] Add support for generating OpenSBI domains in the device tree
,
Gregor Haas
,
17:04
[PATCH v3 0/1] Add support for generating OpenSBI domains in the device tree
,
Gregor Haas
,
17:04
Re: [PATCH v2 1/1] Add support for generating OpenSBI domains in the device tree
,
Gregor Haas
,
16:16
Re: [PATCH for-9.2 v6 02/12] hw/riscv: add riscv-iommu-bits.h
,
Daniel Henrique Barboza
,
14:25
[PATCH for-9.1 1/1] roms/opensbi: Update to v1.5.1
,
Daniel Henrique Barboza
,
08:03
[PATCH for-9.1 0/1] roms/opensbi: update to v1.5.1
,
Daniel Henrique Barboza
,
08:03
[PATCH 2/2] target/riscv: Remove get_field and set_field
,
Alistair Francis
,
00:34
[PATCH 1/2] include: bitops: Add mask extract64/deposit64
,
Alistair Francis
,
00:33
[PATCH 0/2] target/riscv: Convert RISC-V custom bitops to standard ones
,
Alistair Francis
,
00:33
August 04, 2024
Re: [PATCH] RISC-V: Remove riscv_cpu_claim_interrupts()
,
Alistair Francis
,
22:16
Re: [PATCH] target/riscv: Add asserts for out-of-bound access
,
Alistair Francis
,
22:05
Re: [PATCH] target/riscv: Add asserts for out-of-bound access
,
Alistair Francis
,
22:02
Re: [PATCH v3 0/3] target/riscv: Remove redundant insn length check for zama16b
,
Alistair Francis
,
21:52
Re: [PATCH v3 3/3] target/riscv: Relax fld alignment requirement
,
Alistair Francis
,
19:57
Re: [PATCH v3 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b
,
Alistair Francis
,
19:55
Re: [PATCH v3 1/3] target/riscv: Remove redundant insn length check for zama16b
,
Alistair Francis
,
19:53
Re: [PATCH for-9.2 v6 12/12] docs/specs: add riscv-iommu
,
Alistair Francis
,
19:39
Re: [PATCH for-9.2 v6 10/12] hw/riscv/riscv-iommu: add DBG support
,
Alistair Francis
,
19:36
Re: [PATCH for-9.2 v6 03/12] hw/riscv: add RISC-V IOMMU base emulation
,
Alistair Francis
,
19:24
Re: [PATCH for-9.2 v6 02/12] hw/riscv: add riscv-iommu-bits.h
,
Alistair Francis
,
19:05
Re: [PATCH v2 1/1] Add support for generating OpenSBI domains in the device tree
,
Daniel Henrique Barboza
,
15:05
August 02, 2024
Re: [PATCH v3 3/3] target/riscv: Relax fld alignment requirement
,
Richard Henderson
,
03:54
Re: [PATCH v3 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b
,
Richard Henderson
,
03:54
Re: [PATCH v3 1/3] target/riscv: Remove redundant insn length check for zama16b
,
Richard Henderson
,
03:54
Re: [PATCH 8/8] qemu-options: Add the description of smp-cache object
,
Zhao Liu
,
03:42
[PATCH v3 3/3] target/riscv: Relax fld alignment requirement
,
LIU Zhiwei
,
03:26
[PATCH v3 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b
,
LIU Zhiwei
,
03:26
[PATCH v3 1/3] target/riscv: Remove redundant insn length check for zama16b
,
LIU Zhiwei
,
03:25
[PATCH v3 0/3] target/riscv: Remove redundant insn length check for zama16b
,
LIU Zhiwei
,
03:25
Re: [PATCH v2 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b
,
LIU Zhiwei
,
02:53
Re: [PATCH v2 3/3] target/riscv: Relax fld alignment requirement
,
Richard Henderson
,
02:49
Re: [PATCH v2 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b
,
Richard Henderson
,
02:46
Re: [PATCH v2 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b
,
Richard Henderson
,
02:45
Re: [PATCH v2 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b
,
LIU Zhiwei
,
02:42
Re: [PATCH v2 1/3] target/riscv: Remove redundant insn length check for zama16b
,
LIU Zhiwei
,
02:31
Re: [PATCH v2 3/3] target/riscv: Relax fld alignment requirement
,
LIU Zhiwei
,
02:27
Re: [PATCH v2 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b
,
LIU Zhiwei
,
02:22
Re: [PATCH v2 3/3] target/riscv: Relax fld alignment requirement
,
Richard Henderson
,
01:52
Re: [PATCH v2 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b
,
Richard Henderson
,
01:47
Re: [PATCH v2 1/3] target/riscv: Remove redundant insn length check for zama16b
,
Richard Henderson
,
01:39
August 01, 2024
[PATCH v2 3/3] target/riscv: Relax fld alignment requirement
,
LIU Zhiwei
,
23:18
[PATCH v2 2/3] target/riscv: Add MXLEN check for F/D/Q applies to zama16b
,
LIU Zhiwei
,
23:17
[PATCH v2 1/3] target/riscv: Remove redundant insn length check for zama16b
,
LIU Zhiwei
,
23:17
[PATCH v2 0/3] target/riscv: Remove redundant insn length check for zama16b
,
LIU Zhiwei
,
23:16
[PATCH for-9.2 v6 12/12] docs/specs: add riscv-iommu
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 11/12] qtest/riscv-iommu-test: add init queues test
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 10/12] hw/riscv/riscv-iommu: add DBG support
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 09/12] hw/riscv/riscv-iommu: add ATS support
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 08/12] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 06/12] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 03/12] hw/riscv: add RISC-V IOMMU base emulation
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 07/12] test/qtest: add riscv-iommu-pci tests
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 05/12] hw/riscv: add riscv-iommu-pci reference device
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 04/12] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 02/12] hw/riscv: add riscv-iommu-bits.h
,
Daniel Henrique Barboza
,
11:44
[PATCH for-9.2 v6 01/12] exec/memtxattr: add process identifier to the transaction attributes
,
Daniel Henrique Barboza
,
11:43
[PATCH for-9.2 v6 00/12] riscv: QEMU RISC-V IOMMU Support
,
Daniel Henrique Barboza
,
11:43
[PATCH v2 3/3] hw/net: xilinx_axienet: Fix DMA RX IRQ if ethernet disable RX
,
Jim Shu
,
10:06
[PATCH v2 2/3] hw/dma: xilinx_axidma: Send DMA error IRQ if any memory access is failed
,
Jim Shu
,
10:06
[PATCH v2 0/3] Several fixes of AXI-ethernet/DMA
,
Jim Shu
,
10:06
[PATCH v2 1/3] hw/dma: xilinx_axidma: Correct the txlen value in the descriptor
,
Jim Shu
,
10:06
Re: [PATCH 8/8] qemu-options: Add the description of smp-cache object
,
Markus Armbruster
,
07:28
Re: [PATCH 8/8] qemu-options: Add the description of smp-cache object
,
Zhao Liu
,
05:21
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